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    Searched defs:U4_8 (Results 1 - 4 of 4) sorted by relevancy

  /src/external/gpl3/binutils/dist/opcodes/
s390-opc.c 203 #define U4_8 (I32_16 + 1) /* 4 bit unsigned value starting at 8 */
205 #define U4_12 (U4_8 + 1) /* 4 bit unsigned value starting at 12 */
310 #define INSTR_MII_UPP 6, { U4_8,J12_12,J24_24 } /* e.g. bprp */
330 #define INSTR_RIL_UP 6, { U4_8,J32_16,0,0,0,0 } /* e.g. brcl */
337 #define INSTR_RI_UP 4, { U4_8,J16_16,0,0,0,0 } /* e.g. brc */
407 #define INSTR_RR_UR 2, { U4_8,R_12,0,0,0,0 } /* e.g. bcr */
446 #define INSTR_RXY_URRD 6, { U4_8,D20_20,X_12,B_16,0,0 } /* e.g. pfd */
453 #define INSTR_RX_URRD 4, { U4_8,D_20,X_12,B_16,0,0 } /* e.g. bc */
461 #define INSTR_SMI_U0RDP 6, { U4_8,J16_32,D_20,B_16,0,0 } /* e.g. bpp */
  /src/external/gpl3/binutils.old/dist/opcodes/
s390-opc.c 203 #define U4_8 (I32_16 + 1) /* 4 bit unsigned value starting at 8 */
205 #define U4_12 (U4_8 + 1) /* 4 bit unsigned value starting at 12 */
310 #define INSTR_MII_UPP 6, { U4_8,J12_12,J24_24 } /* e.g. bprp */
330 #define INSTR_RIL_UP 6, { U4_8,J32_16,0,0,0,0 } /* e.g. brcl */
337 #define INSTR_RI_UP 4, { U4_8,J16_16,0,0,0,0 } /* e.g. brc */
407 #define INSTR_RR_UR 2, { U4_8,R_12,0,0,0,0 } /* e.g. bcr */
446 #define INSTR_RXY_URRD 6, { U4_8,D20_20,X_12,B_16,0,0 } /* e.g. pfd */
453 #define INSTR_RX_URRD 4, { U4_8,D_20,X_12,B_16,0,0 } /* e.g. bc */
461 #define INSTR_SMI_U0RDP 6, { U4_8,J16_32,D_20,B_16,0,0 } /* e.g. bpp */
  /src/external/gpl3/gdb.old/dist/opcodes/
s390-opc.c 203 #define U4_8 (I32_16 + 1) /* 4 bit unsigned value starting at 8 */
205 #define U4_12 (U4_8 + 1) /* 4 bit unsigned value starting at 12 */
310 #define INSTR_MII_UPP 6, { U4_8,J12_12,J24_24 } /* e.g. bprp */
330 #define INSTR_RIL_UP 6, { U4_8,J32_16,0,0,0,0 } /* e.g. brcl */
337 #define INSTR_RI_UP 4, { U4_8,J16_16,0,0,0,0 } /* e.g. brc */
407 #define INSTR_RR_UR 2, { U4_8,R_12,0,0,0,0 } /* e.g. bcr */
446 #define INSTR_RXY_URRD 6, { U4_8,D20_20,X_12,B_16,0,0 } /* e.g. pfd */
453 #define INSTR_RX_URRD 4, { U4_8,D_20,X_12,B_16,0,0 } /* e.g. bc */
461 #define INSTR_SMI_U0RDP 6, { U4_8,J16_32,D_20,B_16,0,0 } /* e.g. bpp */
  /src/external/gpl3/gdb/dist/opcodes/
s390-opc.c 203 #define U4_8 (I32_16 + 1) /* 4 bit unsigned value starting at 8 */
205 #define U4_12 (U4_8 + 1) /* 4 bit unsigned value starting at 12 */
310 #define INSTR_MII_UPP 6, { U4_8,J12_12,J24_24 } /* e.g. bprp */
330 #define INSTR_RIL_UP 6, { U4_8,J32_16,0,0,0,0 } /* e.g. brcl */
337 #define INSTR_RI_UP 4, { U4_8,J16_16,0,0,0,0 } /* e.g. brc */
407 #define INSTR_RR_UR 2, { U4_8,R_12,0,0,0,0 } /* e.g. bcr */
446 #define INSTR_RXY_URRD 6, { U4_8,D20_20,X_12,B_16,0,0 } /* e.g. pfd */
453 #define INSTR_RX_URRD 4, { U4_8,D_20,X_12,B_16,0,0 } /* e.g. bc */
461 #define INSTR_SMI_U0RDP 6, { U4_8,J16_32,D_20,B_16,0,0 } /* e.g. bpp */

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