NetBSD Cross-Reference & Source Code Search Engine

Home	Sort by: relevance \| last modified time \| path

Full Search

in project(s):

Definition

Symbol

File Path

History

| | Help

Searched defs:URT (Results 1 - 4 of 4) sorted by relevancy

/src/external/gpl3/binutils/dist/opcodes/
ppc-opc.c	3866 #define URT FSL + 1 3869 #define URA URT + 1 5811 {"udi0fcm.", APU(4, 515,0), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5812 {"udi0fcm", APU(4, 515,1), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5846 {"udi1fcm.", APU(4, 547,0), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5847 {"udi1fcm", APU(4, 547,1), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5889 {"udi2fcm.", APU(4, 579,0), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5890 {"udi2fcm", APU(4, 579,1), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5905 {"udi3fcm.", APU(4, 611,0), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5907 {"udi3fcm", APU(4, 611,1), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}} [all...]
/src/external/gpl3/binutils.old/dist/opcodes/
ppc-opc.c	3865 #define URT FSL + 1 3868 #define URA URT + 1 5783 {"udi0fcm.", APU(4, 515,0), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5784 {"udi0fcm", APU(4, 515,1), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5818 {"udi1fcm.", APU(4, 547,0), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5819 {"udi1fcm", APU(4, 547,1), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5861 {"udi2fcm.", APU(4, 579,0), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5862 {"udi2fcm", APU(4, 579,1), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5877 {"udi3fcm.", APU(4, 611,0), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5879 {"udi3fcm", APU(4, 611,1), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}} [all...]
/src/external/gpl3/gdb/dist/opcodes/
ppc-opc.c	3787 #define URT FSL + 1 3790 #define URA URT + 1 5664 {"udi0fcm.", APU(4, 515,0), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5665 {"udi0fcm", APU(4, 515,1), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5699 {"udi1fcm.", APU(4, 547,0), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5700 {"udi1fcm", APU(4, 547,1), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5742 {"udi2fcm.", APU(4, 579,0), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5743 {"udi2fcm", APU(4, 579,1), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5758 {"udi3fcm.", APU(4, 611,0), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5760 {"udi3fcm", APU(4, 611,1), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}} [all...]
/src/external/gpl3/gdb.old/dist/opcodes/
ppc-opc.c	3787 #define URT FSL + 1 3790 #define URA URT + 1 5664 {"udi0fcm.", APU(4, 515,0), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5665 {"udi0fcm", APU(4, 515,1), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5699 {"udi1fcm.", APU(4, 547,0), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5700 {"udi1fcm", APU(4, 547,1), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5742 {"udi2fcm.", APU(4, 579,0), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5743 {"udi2fcm", APU(4, 579,1), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5758 {"udi3fcm.", APU(4, 611,0), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}}, 5760 {"udi3fcm", APU(4, 611,1), APU_MASK, PPC405\|PPC440, 0, {URT, URA, URB}} [all...]

Completed in 41 milliseconds