| /src/external/apache2/llvm/dist/llvm/include/llvm/BinaryFormat/ |
| AMDGPUMetadataVerifier.h | 24 namespace V3 {
64 } // end namespace V3
|
| /src/external/apache2/llvm/dist/llvm/lib/BinaryFormat/ |
| AMDGPUMetadataVerifier.cpp | 21 namespace V3 {
296 } // end namespace V3
|
| /src/external/apache2/llvm/dist/llvm/lib/Support/ |
| xxhash.cpp | 82 uint64_t V3 = Seed + 0;
90 V3 = round(V3, endian::read64le(P));
96 H64 = rotl64(V1, 1) + rotl64(V2, 7) + rotl64(V3, 12) + rotl64(V4, 18);
99 H64 = mergeRound(H64, V3);
|
| /src/external/apache2/llvm/dist/llvm/examples/IRTransforms/ |
| SimplifyCFG.cpp | 49 enum TutorialVersion { V1, V2, V3 };
55 clEnumValN(V3, "v3", "version 3"),
57 clEnumValN(V3, "", "")));
398 case V3: {
|
| /src/external/gpl3/gdb/dist/gdb/testsuite/gdb.base/ |
| max-depth.c | 220 struct V3 : virtual V1 { int v3 = 3; } v3; variable in typeref:struct:V1
223 struct V6 : virtual V2, virtual V3 { int v6 = 1; } v6;
|
| /src/external/gpl3/gdb.old/dist/gdb/testsuite/gdb.base/ |
| max-depth.c | 220 struct V3 : virtual V1 { int v3 = 3; } v3; variable in typeref:struct:V1
223 struct V6 : virtual V2, virtual V3 { int v6 = 1; } v6;
|
| /src/external/bsd/openldap/dist/contrib/slapd-modules/comp_match/ |
| crl.h | 29 #define V3 2
31 typedef ComponentInt ComponentVersion; /* INTEGER { V1 (0), V2 (1), V3 (2) } */
|
| certificate.h | 51 #define V3 2
53 typedef ComponentInt ComponentVersion; /* INTEGER { V1 (0), V2 (1), V3 (2) } */
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/Support/ |
| AMDGPUMetadata.h | 37 /// HSA metadata major version for code object V3.
39 /// HSA metadata minor version for code object V3.
207 /// Offset in bytes. Required for code object v3, unused for code object v2.
450 // HSA metadata for v3 code object.
452 namespace V3 {
462 } // end namespace V3
|
| /src/external/gpl3/gdb/dist/sim/aarch64/ |
| cpustate.h | 95 V3,
|
| /src/external/gpl3/gdb.old/dist/sim/aarch64/ |
| cpustate.h | 95 V3,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonHardwareLoops.cpp | 1543 int64_t V1, V3;
1544 if (!checkForImmediate(S1, V1) || !checkForImmediate(S3, V3))
1549 TV = V1 | (V3 << 32);
1551 TV = V3 | (V1 << 32);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMISelDAGToDAG.cpp | 330 SDNode *createQuadSRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
331 SDNode *createQuadDRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
332 SDNode *createQuadQRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
1874 SDValue V2, SDValue V3) {
1883 V2, SubReg2, V3, SubReg3 };
1889 SDValue V2, SDValue V3) {
1898 V2, SubReg2, V3, SubReg3 };
1904 SDValue V2, SDValue V3) {
1913 V2, SubReg2, V3, SubReg3 };
2284 SDValue V3 = (NumVecs == 3
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 4233 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8,
4701 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8,
5935 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8,
6536 PPC::V2, PPC::V3, PPC::V4, PPC::V5,
9963 // Lower this to a VPERM(V1, V2, V3) expression, where V3 is a constant
10496 SDValue V3 = Op.getOperand(2);
10508 return DAG.getNode(PPCISD::VECINSERT, dl, VT, V1, V2, V3);
10514 return DAG.getNode(PPCISD::VECINSERT, dl, VT, V1, V2, V3);
|
