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      1 /*	$NetBSD: qcom,mmcc-msm8960.h,v 1.1.1.2 2020/01/03 14:33:05 skrll Exp $	*/
      2 
      3 /* SPDX-License-Identifier: GPL-2.0-only */
      4 /*
      5  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
      6  */
      7 
      8 #ifndef _DT_BINDINGS_CLK_MSM_MMCC_8960_H
      9 #define _DT_BINDINGS_CLK_MSM_MMCC_8960_H
     10 
     11 #define MMSS_AHB_SRC					0
     12 #define FAB_AHB_CLK					1
     13 #define APU_AHB_CLK					2
     14 #define TV_ENC_AHB_CLK					3
     15 #define AMP_AHB_CLK					4
     16 #define DSI2_S_AHB_CLK					5
     17 #define JPEGD_AHB_CLK					6
     18 #define GFX2D0_AHB_CLK					7
     19 #define DSI_S_AHB_CLK					8
     20 #define DSI2_M_AHB_CLK					9
     21 #define VPE_AHB_CLK					10
     22 #define SMMU_AHB_CLK					11
     23 #define HDMI_M_AHB_CLK					12
     24 #define VFE_AHB_CLK					13
     25 #define ROT_AHB_CLK					14
     26 #define VCODEC_AHB_CLK					15
     27 #define MDP_AHB_CLK					16
     28 #define DSI_M_AHB_CLK					17
     29 #define CSI_AHB_CLK					18
     30 #define MMSS_IMEM_AHB_CLK				19
     31 #define IJPEG_AHB_CLK					20
     32 #define HDMI_S_AHB_CLK					21
     33 #define GFX3D_AHB_CLK					22
     34 #define GFX2D1_AHB_CLK					23
     35 #define MMSS_FPB_CLK					24
     36 #define MMSS_AXI_SRC					25
     37 #define MMSS_FAB_CORE					26
     38 #define FAB_MSP_AXI_CLK					27
     39 #define JPEGD_AXI_CLK					28
     40 #define GMEM_AXI_CLK					29
     41 #define MDP_AXI_CLK					30
     42 #define MMSS_IMEM_AXI_CLK				31
     43 #define IJPEG_AXI_CLK					32
     44 #define GFX3D_AXI_CLK					33
     45 #define VCODEC_AXI_CLK					34
     46 #define VFE_AXI_CLK					35
     47 #define VPE_AXI_CLK					36
     48 #define ROT_AXI_CLK					37
     49 #define VCODEC_AXI_A_CLK				38
     50 #define VCODEC_AXI_B_CLK				39
     51 #define MM_AXI_S3_FCLK					40
     52 #define MM_AXI_S2_FCLK					41
     53 #define MM_AXI_S1_FCLK					42
     54 #define MM_AXI_S0_FCLK					43
     55 #define MM_AXI_S2_CLK					44
     56 #define MM_AXI_S1_CLK					45
     57 #define MM_AXI_S0_CLK					46
     58 #define CSI0_SRC					47
     59 #define CSI0_CLK					48
     60 #define CSI0_PHY_CLK					49
     61 #define CSI1_SRC					50
     62 #define CSI1_CLK					51
     63 #define CSI1_PHY_CLK					52
     64 #define CSI2_SRC					53
     65 #define CSI2_CLK					54
     66 #define CSI2_PHY_CLK					55
     67 #define DSI_SRC						56
     68 #define DSI_CLK						57
     69 #define CSI_PIX_CLK					58
     70 #define CSI_RDI_CLK					59
     71 #define MDP_VSYNC_CLK					60
     72 #define HDMI_DIV_CLK					61
     73 #define HDMI_APP_CLK					62
     74 #define CSI_PIX1_CLK					63
     75 #define CSI_RDI2_CLK					64
     76 #define CSI_RDI1_CLK					65
     77 #define GFX2D0_SRC					66
     78 #define GFX2D0_CLK					67
     79 #define GFX2D1_SRC					68
     80 #define GFX2D1_CLK					69
     81 #define GFX3D_SRC					70
     82 #define GFX3D_CLK					71
     83 #define IJPEG_SRC					72
     84 #define IJPEG_CLK					73
     85 #define JPEGD_SRC					74
     86 #define JPEGD_CLK					75
     87 #define MDP_SRC						76
     88 #define MDP_CLK						77
     89 #define MDP_LUT_CLK					78
     90 #define DSI2_PIXEL_SRC					79
     91 #define DSI2_PIXEL_CLK					80
     92 #define DSI2_SRC					81
     93 #define DSI2_CLK					82
     94 #define DSI1_BYTE_SRC					83
     95 #define DSI1_BYTE_CLK					84
     96 #define DSI2_BYTE_SRC					85
     97 #define DSI2_BYTE_CLK					86
     98 #define DSI1_ESC_SRC					87
     99 #define DSI1_ESC_CLK					88
    100 #define DSI2_ESC_SRC					89
    101 #define DSI2_ESC_CLK					90
    102 #define ROT_SRC						91
    103 #define ROT_CLK						92
    104 #define TV_ENC_CLK					93
    105 #define TV_DAC_CLK					94
    106 #define HDMI_TV_CLK					95
    107 #define MDP_TV_CLK					96
    108 #define TV_SRC						97
    109 #define VCODEC_SRC					98
    110 #define VCODEC_CLK					99
    111 #define VFE_SRC						100
    112 #define VFE_CLK						101
    113 #define VFE_CSI_CLK					102
    114 #define VPE_SRC						103
    115 #define VPE_CLK						104
    116 #define DSI_PIXEL_SRC					105
    117 #define DSI_PIXEL_CLK					106
    118 #define CAMCLK0_SRC					107
    119 #define CAMCLK0_CLK					108
    120 #define CAMCLK1_SRC					109
    121 #define CAMCLK1_CLK					110
    122 #define CAMCLK2_SRC					111
    123 #define CAMCLK2_CLK					112
    124 #define CSIPHYTIMER_SRC					113
    125 #define CSIPHY2_TIMER_CLK				114
    126 #define CSIPHY1_TIMER_CLK				115
    127 #define CSIPHY0_TIMER_CLK				116
    128 #define PLL1						117
    129 #define PLL2						118
    130 #define RGB_TV_CLK					119
    131 #define NPL_TV_CLK					120
    132 #define VCAP_AHB_CLK					121
    133 #define VCAP_AXI_CLK					122
    134 #define VCAP_SRC					123
    135 #define VCAP_CLK					124
    136 #define VCAP_NPL_CLK					125
    137 #define PLL15						126
    138 
    139 #endif
    140