| /src/external/gpl3/binutils/dist/opcodes/ |
| mips-opc.c | 31 /* The 4-bit XYZW mask used in some VU0 instructions. */
357 /* Support for VU0 Coprocessor instructions */
358 #define VU0 EE
536 /* R5900 VU0 Macromode instructions. */
537 {"vabs", "+7+K,+6+K", 0x4a0001fd, 0xfe0007ff, CP, VU0CH, VU0, 0, 0 },
538 {"vadd", "+5+K,+6+K,+7+K", 0x4a000028, 0xfe00003f, CP, VU0CH, VU0, 0, 0 },
539 {"vaddi", "+5+K,+6+K,+y", 0x4a000022, 0xfe1f003f, CP, VU0CH, VU0, 0, 0 },
540 {"vaddq", "+5+K,+6+K,+q", 0x4a000020, 0xfe1f003f, CP, VU0CH, VU0, 0, 0 },
541 {"vaddw", "+5+K,+6+K,+7+N", 0x4a000003, 0xfe00003f, CP, VU0CH, VU0, 0, 0 },
542 {"vaddx", "+5+K,+6+K,+7+N", 0x4a000000, 0xfe00003f, CP, VU0CH, VU0, 0, 0 }
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| mips-opc.c | 31 /* The 4-bit XYZW mask used in some VU0 instructions. */
357 /* Support for VU0 Coprocessor instructions */
358 #define VU0 EE
536 /* R5900 VU0 Macromode instructions. */
537 {"vabs", "+7+K,+6+K", 0x4a0001fd, 0xfe0007ff, CP, VU0CH, VU0, 0, 0 },
538 {"vadd", "+5+K,+6+K,+7+K", 0x4a000028, 0xfe00003f, CP, VU0CH, VU0, 0, 0 },
539 {"vaddi", "+5+K,+6+K,+y", 0x4a000022, 0xfe1f003f, CP, VU0CH, VU0, 0, 0 },
540 {"vaddq", "+5+K,+6+K,+q", 0x4a000020, 0xfe1f003f, CP, VU0CH, VU0, 0, 0 },
541 {"vaddw", "+5+K,+6+K,+7+N", 0x4a000003, 0xfe00003f, CP, VU0CH, VU0, 0, 0 },
542 {"vaddx", "+5+K,+6+K,+7+N", 0x4a000000, 0xfe00003f, CP, VU0CH, VU0, 0, 0 }
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| mips-opc.c | 31 /* The 4-bit XYZW mask used in some VU0 instructions. */
357 /* Support for VU0 Coprocessor instructions */
358 #define VU0 EE
536 /* R5900 VU0 Macromode instructions. */
537 {"vabs", "+7+K,+6+K", 0x4a0001fd, 0xfe0007ff, CP, VU0CH, VU0, 0, 0 },
538 {"vadd", "+5+K,+6+K,+7+K", 0x4a000028, 0xfe00003f, CP, VU0CH, VU0, 0, 0 },
539 {"vaddi", "+5+K,+6+K,+y", 0x4a000022, 0xfe1f003f, CP, VU0CH, VU0, 0, 0 },
540 {"vaddq", "+5+K,+6+K,+q", 0x4a000020, 0xfe1f003f, CP, VU0CH, VU0, 0, 0 },
541 {"vaddw", "+5+K,+6+K,+7+N", 0x4a000003, 0xfe00003f, CP, VU0CH, VU0, 0, 0 },
542 {"vaddx", "+5+K,+6+K,+7+N", 0x4a000000, 0xfe00003f, CP, VU0CH, VU0, 0, 0 }
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| mips-opc.c | 31 /* The 4-bit XYZW mask used in some VU0 instructions. */
356 /* Support for VU0 Coprocessor instructions */
357 #define VU0 EE
535 /* R5900 VU0 Macromode instructions. */
536 {"vabs", "+7+K,+6+K", 0x4a0001fd, 0xfe0007ff, CP, VU0CH, VU0, 0, 0 },
537 {"vadd", "+5+K,+6+K,+7+K", 0x4a000028, 0xfe00003f, CP, VU0CH, VU0, 0, 0 },
538 {"vaddi", "+5+K,+6+K,+y", 0x4a000022, 0xfe1f003f, CP, VU0CH, VU0, 0, 0 },
539 {"vaddq", "+5+K,+6+K,+q", 0x4a000020, 0xfe1f003f, CP, VU0CH, VU0, 0, 0 },
540 {"vaddw", "+5+K,+6+K,+7+N", 0x4a000003, 0xfe00003f, CP, VU0CH, VU0, 0, 0 },
541 {"vaddx", "+5+K,+6+K,+7+N", 0x4a000000, 0xfe00003f, CP, VU0CH, VU0, 0, 0 }
[all...] |
