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    Searched defs:VecSize (Results 1 - 15 of 15) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
NVPTXReplaceImageHandles.cpp 96 unsigned VecSize =
100 MachineOperand &SurfHandle = MI.getOperand(VecSize);
NVPTXAsmPrinter.cpp 170 unsigned VecSize =
174 if (OpNo == VecSize && MO.isImm()) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonVExtract.cpp 161 unsigned VecSize = HRI.getRegSizeInBits(VecRC) / 8;
171 SR == 0 ? 0 : VecSize/2);
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/
X86ShuffleDecode.cpp 478 unsigned VecSize = NumElts * ScalarBits;
479 unsigned NumLanes = VecSize / 128;
481 assert((VecSize == 128 || VecSize == 256 || VecSize == 512) &&
500 unsigned VecSize = NumElts * ScalarBits;
501 unsigned NumLanes = VecSize / 128;
503 assert((VecSize == 128 || VecSize == 256) && "Unexpected vector size");
  /src/external/gpl3/binutils/dist/gprofng/src/
vec.h 33 #define VecSize(x) ((x) ? (x)->size() : 0)
  /src/external/gpl3/binutils.old/dist/gprofng/src/
vec.h 33 #define VecSize(x) ((x) ? (x)->size() : 0)
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/
InstCombineVectorOps.cpp 1033 int VecSize =
1037 if (MaskSize != VecSize)
1044 if (Elt != -1 && Elt != i && Elt != i + VecSize)
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUISelDAGToDAG.cpp 2780 unsigned VecSize = Src.getValueSizeInBits();
2784 if (Lo.getValueSizeInBits() > VecSize) {
2786 (VecSize > 32) ? AMDGPU::sub0_sub1 : AMDGPU::sub0, SDLoc(In),
2787 MVT::getIntegerVT(VecSize), Lo);
2790 if (Hi.getValueSizeInBits() > VecSize) {
2792 (VecSize > 32) ? AMDGPU::sub0_sub1 : AMDGPU::sub0, SDLoc(In),
2793 MVT::getIntegerVT(VecSize), Hi);
2796 assert(Lo.getValueSizeInBits() <= VecSize &&
2797 Hi.getValueSizeInBits() <= VecSize);
2803 if (VecSize == 32 || VecSize == Lo.getValueSizeInBits())
    [all...]
AMDGPUInstructionSelector.cpp 2697 unsigned VecSize = VecTy.getSizeInBits();
2740 VecSize, ValSize, VecRB->getID() == AMDGPU::SGPRRegBankID);
SIISelLowering.cpp 5399 unsigned VecSize = VecVT.getSizeInBits();
5403 assert(VecSize <= 64);
5439 MVT IntVT = MVT::getIntegerVT(VecSize);
5476 unsigned VecSize = VecVT.getSizeInBits();
5478 assert(VecSize <= 64);
5492 MVT IntVT = MVT::getIntegerVT(VecSize);
10094 unsigned VecSize = EltSize * NumElem;
10097 if (VecSize <= 64 && EltSize < 32)
10187 unsigned VecSize = VecVT.getSizeInBits();
10216 VecSize > 32 &
    [all...]
  /src/external/apache2/llvm/dist/clang/lib/CodeGen/
TargetInfo.cpp 1058 unsigned VecSize = Context.getTypeSize(VT);
1059 if (VecSize == 128 || VecSize == 256 || VecSize == 512)
5860 unsigned VecSize = getContext().getTypeSize(VT);
5861 if (VecSize == 64 || VecSize == 128)
6854 unsigned VecSize = getContext().getTypeSize(VT);
6855 if (VecSize == 64 || VecSize == 128
    [all...]
  /src/external/apache2/llvm/dist/clang/lib/Sema/
SemaType.cpp 2558 Optional<llvm::APSInt> VecSize = SizeExpr->getIntegerConstantExpr(Context);
2559 if (!VecSize) {
2570 // vecSize is specified in bytes - convert to bits.
2571 if (!VecSize->isIntN(61)) {
2577 uint64_t VectorSizeBits = VecSize->getZExtValue() * 8;
2622 Optional<llvm::APSInt> vecSize = ArraySize->getIntegerConstantExpr(Context);
2623 if (!vecSize) {
2630 if (!vecSize->isIntN(32)) {
2637 unsigned vectorSize = static_cast<unsigned>(vecSize->getZExtValue());
7830 unsigned vecSize = typeSize * numElts
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp 6642 const unsigned VecSize = 16;
6643 const Align VecAlign(VecSize);
6655 const unsigned Offset = State.AllocateStack(VecSize, VecAlign);
6684 for (unsigned I = 0; I != VecSize; I += PtrSize)
6686 State.AllocateStack(VecSize, VecAlign);
6690 const unsigned Offset = State.AllocateStack(VecSize, VecAlign);
6697 const unsigned Offset = State.AllocateStack(VecSize, VecAlign);
6706 const unsigned Offset = State.AllocateStack(VecSize, VecAlign);
6724 const unsigned Offset = State.AllocateStack(VecSize, VecAlign);
6727 for (unsigned I = 0; I != VecSize; I += PtrSize)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 11299 unsigned VecSize = DL.getTypeSizeInBits(VecTy);
11312 return VecSize == 64 || VecSize % 128 == 0;
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 19581 unsigned VecSize = DL.getTypeSizeInBits(VecTy);
19608 if (Subtarget->hasNEON() && VecSize == 64)
19610 return VecSize % 128 == 0;

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