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    Searched defs:WDT_WRITE (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/arch/arm/amlogic/
meson_wdt.c 71 #define WDT_WRITE(sc, reg, val) \
81 WDT_WRITE(sc, WATCHDOG_RESET_REG, 0);
84 WDT_WRITE(sc, WATCHDOG_TC_REG, val);
98 WDT_WRITE(sc, WATCHDOG_RESET_REG, 0);
99 WDT_WRITE(sc, WATCHDOG_TC_REG, WATCHDOG_TC_CPUS | WATCHDOG_TC_ENABLE |
110 WDT_WRITE(sc, WATCHDOG_RESET_REG, 0);
149 WDT_WRITE(sc, WATCHDOG_RESET_REG, 0);
152 WDT_WRITE(sc, WATCHDOG_TC_REG, val);
mesongx_wdt.c 74 #define WDT_WRITE(sc, reg, val) \
83 WDT_WRITE(sc, WATCHDOG_CNTL, 0);
98 WDT_WRITE(sc, WATCHDOG_CNTL, 0);
99 WDT_WRITE(sc, WATCHDOG_RESET, 0);
100 WDT_WRITE(sc, WATCHDOG_TCNT, sc->sc_wdog.smw_period * 1000);
101 WDT_WRITE(sc, WATCHDOG_CNTL,
114 WDT_WRITE(sc, WATCHDOG_RESET, 0);
161 WDT_WRITE(sc, WATCHDOG_CNTL, 0);
  /src/sys/arch/arm/sunxi/
sunxi_wdt.c 101 #define WDT_WRITE(sc, reg, val) \
131 WDT_WRITE(sc, SUN4I_WDT_MODE_REG, 0);
143 WDT_WRITE(sc, SUN4I_WDT_MODE_REG, mode);
156 WDT_WRITE(sc, SUN4I_WDT_CTRL_REG, ctrl);
169 WDT_WRITE(sc, SUN6I_WDT_MODE_REG, 0);
181 WDT_WRITE(sc, SUN6I_WDT_CFG_REG, cfg);
182 WDT_WRITE(sc, SUN6I_WDT_MODE_REG, mode);
195 WDT_WRITE(sc, SUN6I_WDT_CTRL_REG, ctrl);
249 WDT_WRITE(sc, SUN6I_WDT_IRQ_EN_REG, 0);

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