| /src/external/gpl3/binutils/dist/opcodes/ |
| mips16-opc.c | 179 #define WR_C0 INSN_COP
286 {"di", "", 0xf006670c, 0xffffffff, WR_C0, 0, 0, E2, 0 },
287 {"di", ".", 0xf006670c, 0xffffffff, WR_C0, 0, 0, E2, 0 },
288 {"di", "y", 0xf002670c, 0xffffff1f, WR_1|WR_C0, 0, 0, E2, 0 },
313 {"ei", "", 0xf007670c, 0xffffffff, WR_C0, 0, 0, E2, 0 },
314 {"ei", ".", 0xf007670c, 0xffffffff, WR_C0, 0, 0, E2, 0 },
315 {"ei", "y", 0xf003670c, 0xffffff1f, WR_1|WR_C0, 0, 0, E2, 0 },
383 {"mtc0", "y,N", 0xf0016700, 0xffffff00, RD_1|WR_C0, 0, 0, E2, 0 },
384 {"mtc0", "y,N,O", 0xf0016700, 0xff1fff00, RD_1|WR_C0, 0, 0, E2, 0 },
458 {"dmt", "", 0xf0266701, 0xffffffff, WR_C0, 0, 0, E2MT, 0 }
[all...] |
| micromips-opc.c | 244 #define WR_C0 INSN_COP
654 {"dmtc0", "t,G", 0x580002fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, I3, 0, 0 },
655 {"dmtc0", "t,G,H", 0x580002fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, I3, 0, 0 },
660 {"dmtgc0", "t,G", 0x580006fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT64, 0 },
661 {"dmtgc0", "t,G,H", 0x580006fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT64, 0 },
714 {"ei", "", 0x0000577c, 0xffffffff, WR_C0, 0, I1, 0, 0 },
715 {"ei", "s", 0x0000577c, 0xffe0ffff, WR_1|WR_C0, 0, I1, 0, 0 },
929 {"mtc0", "t,G", 0x000002fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, I1, 0, 0 },
930 {"mtc0", "t,G,H", 0x000002fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, I1, 0, 0 },
934 {"mtgc0", "t,G", 0x000006fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT, 0 }
[all...] |
| mips-opc.c | 250 #define WR_C0 INSN_COP
1033 {"daddwc", "d,s,t", 0x70000038, 0xfc0007ff, WR_1|RD_2|RD_3|WR_C0|RD_C0, 0, XLR, 0, 0 },
1060 {"di", "", 0x42000039, 0xffffffff, WR_C0, 0, EE, 0, 0 },
1061 {"di", "", 0x41606000, 0xffffffff, WR_C0, 0, I33, 0, 0 },
1062 {"di", "t", 0x41606000, 0xffe0ffff, WR_1|WR_C0, 0, I33, 0, 0 },
1115 {"dmtc0", "t,G", 0x40a00000, 0xffe007ff, RD_1|WR_C0|WR_CC|CM, 0, I3, 0, EE },
1116 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, I64, 0, 0 },
1120 {"dmtgc0", "t,G", 0x40600300, 0xffe007ff, RD_1|WR_C0|WR_CC|CM, 0, 0, IVIRT64, 0 },
1121 {"dmtgc0", "t,G,H", 0x40600300, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, 0, IVIRT64, 0 },
1191 {"ei", "", 0x42000038, 0xffffffff, WR_C0, 0, EE, 0, 0 }
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| mips16-opc.c | 179 #define WR_C0 INSN_COP
286 {"di", "", 0xf006670c, 0xffffffff, WR_C0, 0, 0, E2, 0 },
287 {"di", ".", 0xf006670c, 0xffffffff, WR_C0, 0, 0, E2, 0 },
288 {"di", "y", 0xf002670c, 0xffffff1f, WR_1|WR_C0, 0, 0, E2, 0 },
313 {"ei", "", 0xf007670c, 0xffffffff, WR_C0, 0, 0, E2, 0 },
314 {"ei", ".", 0xf007670c, 0xffffffff, WR_C0, 0, 0, E2, 0 },
315 {"ei", "y", 0xf003670c, 0xffffff1f, WR_1|WR_C0, 0, 0, E2, 0 },
383 {"mtc0", "y,N", 0xf0016700, 0xffffff00, RD_1|WR_C0, 0, 0, E2, 0 },
384 {"mtc0", "y,N,O", 0xf0016700, 0xff1fff00, RD_1|WR_C0, 0, 0, E2, 0 },
458 {"dmt", "", 0xf0266701, 0xffffffff, WR_C0, 0, 0, E2MT, 0 }
[all...] |
| micromips-opc.c | 244 #define WR_C0 INSN_COP
654 {"dmtc0", "t,G", 0x580002fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, I3, 0, 0 },
655 {"dmtc0", "t,G,H", 0x580002fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, I3, 0, 0 },
660 {"dmtgc0", "t,G", 0x580006fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT64, 0 },
661 {"dmtgc0", "t,G,H", 0x580006fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT64, 0 },
714 {"ei", "", 0x0000577c, 0xffffffff, WR_C0, 0, I1, 0, 0 },
715 {"ei", "s", 0x0000577c, 0xffe0ffff, WR_1|WR_C0, 0, I1, 0, 0 },
929 {"mtc0", "t,G", 0x000002fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, I1, 0, 0 },
930 {"mtc0", "t,G,H", 0x000002fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, I1, 0, 0 },
934 {"mtgc0", "t,G", 0x000006fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT, 0 }
[all...] |
| mips-opc.c | 250 #define WR_C0 INSN_COP
1033 {"daddwc", "d,s,t", 0x70000038, 0xfc0007ff, WR_1|RD_2|RD_3|WR_C0|RD_C0, 0, XLR, 0, 0 },
1060 {"di", "", 0x42000039, 0xffffffff, WR_C0, 0, EE, 0, 0 },
1061 {"di", "", 0x41606000, 0xffffffff, WR_C0, 0, I33, 0, 0 },
1062 {"di", "t", 0x41606000, 0xffe0ffff, WR_1|WR_C0, 0, I33, 0, 0 },
1115 {"dmtc0", "t,G", 0x40a00000, 0xffe007ff, RD_1|WR_C0|WR_CC|CM, 0, I3, 0, EE },
1116 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, I64, 0, 0 },
1120 {"dmtgc0", "t,G", 0x40600300, 0xffe007ff, RD_1|WR_C0|WR_CC|CM, 0, 0, IVIRT64, 0 },
1121 {"dmtgc0", "t,G,H", 0x40600300, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, 0, IVIRT64, 0 },
1191 {"ei", "", 0x42000038, 0xffffffff, WR_C0, 0, EE, 0, 0 }
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| mips16-opc.c | 179 #define WR_C0 INSN_COP
286 {"di", "", 0xf006670c, 0xffffffff, WR_C0, 0, 0, E2, 0 },
287 {"di", ".", 0xf006670c, 0xffffffff, WR_C0, 0, 0, E2, 0 },
288 {"di", "y", 0xf002670c, 0xffffff1f, WR_1|WR_C0, 0, 0, E2, 0 },
313 {"ei", "", 0xf007670c, 0xffffffff, WR_C0, 0, 0, E2, 0 },
314 {"ei", ".", 0xf007670c, 0xffffffff, WR_C0, 0, 0, E2, 0 },
315 {"ei", "y", 0xf003670c, 0xffffff1f, WR_1|WR_C0, 0, 0, E2, 0 },
383 {"mtc0", "y,N", 0xf0016700, 0xffffff00, RD_1|WR_C0, 0, 0, E2, 0 },
384 {"mtc0", "y,N,O", 0xf0016700, 0xff1fff00, RD_1|WR_C0, 0, 0, E2, 0 },
458 {"dmt", "", 0xf0266701, 0xffffffff, WR_C0, 0, 0, E2MT, 0 }
[all...] |
| micromips-opc.c | 244 #define WR_C0 INSN_COP
654 {"dmtc0", "t,G", 0x580002fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, I3, 0, 0 },
655 {"dmtc0", "t,G,H", 0x580002fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, I3, 0, 0 },
660 {"dmtgc0", "t,G", 0x580006fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT64, 0 },
661 {"dmtgc0", "t,G,H", 0x580006fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT64, 0 },
714 {"ei", "", 0x0000577c, 0xffffffff, WR_C0, 0, I1, 0, 0 },
715 {"ei", "s", 0x0000577c, 0xffe0ffff, WR_1|WR_C0, 0, I1, 0, 0 },
929 {"mtc0", "t,G", 0x000002fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, I1, 0, 0 },
930 {"mtc0", "t,G,H", 0x000002fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, I1, 0, 0 },
934 {"mtgc0", "t,G", 0x000006fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT, 0 }
[all...] |
| mips-opc.c | 250 #define WR_C0 INSN_COP
1033 {"daddwc", "d,s,t", 0x70000038, 0xfc0007ff, WR_1|RD_2|RD_3|WR_C0|RD_C0, 0, XLR, 0, 0 },
1060 {"di", "", 0x42000039, 0xffffffff, WR_C0, 0, EE, 0, 0 },
1061 {"di", "", 0x41606000, 0xffffffff, WR_C0, 0, I33, 0, 0 },
1062 {"di", "t", 0x41606000, 0xffe0ffff, WR_1|WR_C0, 0, I33, 0, 0 },
1115 {"dmtc0", "t,G", 0x40a00000, 0xffe007ff, RD_1|WR_C0|WR_CC|CM, 0, I3, 0, EE },
1116 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, I64, 0, 0 },
1120 {"dmtgc0", "t,G", 0x40600300, 0xffe007ff, RD_1|WR_C0|WR_CC|CM, 0, 0, IVIRT64, 0 },
1121 {"dmtgc0", "t,G,H", 0x40600300, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, 0, IVIRT64, 0 },
1191 {"ei", "", 0x42000038, 0xffffffff, WR_C0, 0, EE, 0, 0 }
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| mips16-opc.c | 179 #define WR_C0 INSN_COP
286 {"di", "", 0xf006670c, 0xffffffff, WR_C0, 0, 0, E2, 0 },
287 {"di", ".", 0xf006670c, 0xffffffff, WR_C0, 0, 0, E2, 0 },
288 {"di", "y", 0xf002670c, 0xffffff1f, WR_1|WR_C0, 0, 0, E2, 0 },
313 {"ei", "", 0xf007670c, 0xffffffff, WR_C0, 0, 0, E2, 0 },
314 {"ei", ".", 0xf007670c, 0xffffffff, WR_C0, 0, 0, E2, 0 },
315 {"ei", "y", 0xf003670c, 0xffffff1f, WR_1|WR_C0, 0, 0, E2, 0 },
383 {"mtc0", "y,N", 0xf0016700, 0xffffff00, RD_1|WR_C0, 0, 0, E2, 0 },
384 {"mtc0", "y,N,O", 0xf0016700, 0xff1fff00, RD_1|WR_C0, 0, 0, E2, 0 },
458 {"dmt", "", 0xf0266701, 0xffffffff, WR_C0, 0, 0, E2MT, 0 }
[all...] |
| micromips-opc.c | 236 #define WR_C0 INSN_COP
631 {"dmtc0", "t,G", 0x580002fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, I3, 0, 0 },
632 {"dmtc0", "t,G,H", 0x580002fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, I3, 0, 0 },
633 {"dmtgc0", "t,G", 0x580006fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT64, 0 },
634 {"dmtgc0", "t,G,H", 0x580006fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT64, 0 },
693 {"ei", "", 0x0000577c, 0xffffffff, WR_C0, 0, I1, 0, 0 },
694 {"ei", "s", 0x0000577c, 0xffe0ffff, WR_1|WR_C0, 0, I1, 0, 0 },
886 {"mtc0", "t,G", 0x000002fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, I1, 0, 0 },
887 {"mtc0", "t,G,H", 0x000002fc, 0xfc00c7ff, RD_1|WR_C0|WR_CC, 0, I1, 0, 0 },
891 {"mtgc0", "t,G", 0x000006fc, 0xfc00ffff, RD_1|WR_C0|WR_CC, 0, 0, IVIRT, 0 }
[all...] |
| mips-opc.c | 249 #define WR_C0 INSN_COP
1032 {"daddwc", "d,s,t", 0x70000038, 0xfc0007ff, WR_1|RD_2|RD_3|WR_C0|RD_C0, 0, XLR, 0, 0 },
1059 {"di", "", 0x42000039, 0xffffffff, WR_C0, 0, EE, 0, 0 },
1060 {"di", "", 0x41606000, 0xffffffff, WR_C0, 0, I33, 0, 0 },
1061 {"di", "t", 0x41606000, 0xffe0ffff, WR_1|WR_C0, 0, I33, 0, 0 },
1111 {"dmtc0", "t,G", 0x40a00000, 0xffe007ff, RD_1|WR_C0|WR_CC|CM, 0, I3, 0, EE },
1112 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, I64, 0, 0 },
1113 {"dmtgc0", "t,G", 0x40600300, 0xffe007ff, RD_1|WR_C0|WR_CC|CM, 0, 0, IVIRT64, 0 },
1114 {"dmtgc0", "t,G,H", 0x40600300, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, 0, IVIRT64, 0 },
1190 {"ei", "", 0x42000038, 0xffffffff, WR_C0, 0, EE, 0, 0 }
[all...] |
