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Searched defs:WR_MACC (Results 1 - 4 of 4) sorted by relevancy

/src/external/gpl3/binutils/dist/opcodes/
mips-opc.c	275 #define WR_MACC INSN2_WRITE_MDMX_ACC 685 {"adda.ob", "Y,Q", 0x78000037, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, SB1, MX, 0 }, 686 {"adda.qh", "Y,Q", 0x78200037, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, 0, MX, 0 }, 692 {"addl.ob", "Y,Q", 0x78000437, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, SB1, MX, 0 }, 693 {"addl.qh", "Y,Q", 0x78200437, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, 0, MX, 0 }, 1600 {"mula.ob", "Y,Q", 0x78000033, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, SB1, MX, 0 }, 1601 {"mula.ob", "S,Q", 0x48000033, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, N54, 0, 0 }, 1602 {"mula.qh", "Y,Q", 0x78200033, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, 0, MX, 0 }, 1606 {"mull.ob", "Y,Q", 0x78000433, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, SB1, MX, 0 }, 1607 {"mull.ob", "S,Q", 0x48000433, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, N54, 0, 0 } [all...]
/src/external/gpl3/binutils.old/dist/opcodes/
mips-opc.c	275 #define WR_MACC INSN2_WRITE_MDMX_ACC 685 {"adda.ob", "Y,Q", 0x78000037, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, SB1, MX, 0 }, 686 {"adda.qh", "Y,Q", 0x78200037, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, 0, MX, 0 }, 692 {"addl.ob", "Y,Q", 0x78000437, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, SB1, MX, 0 }, 693 {"addl.qh", "Y,Q", 0x78200437, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, 0, MX, 0 }, 1600 {"mula.ob", "Y,Q", 0x78000033, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, SB1, MX, 0 }, 1601 {"mula.ob", "S,Q", 0x48000033, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, N54, 0, 0 }, 1602 {"mula.qh", "Y,Q", 0x78200033, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, 0, MX, 0 }, 1606 {"mull.ob", "Y,Q", 0x78000433, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, SB1, MX, 0 }, 1607 {"mull.ob", "S,Q", 0x48000433, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, N54, 0, 0 } [all...]
/src/external/gpl3/gdb/dist/opcodes/
mips-opc.c	275 #define WR_MACC INSN2_WRITE_MDMX_ACC 685 {"adda.ob", "Y,Q", 0x78000037, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, SB1, MX, 0 }, 686 {"adda.qh", "Y,Q", 0x78200037, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, 0, MX, 0 }, 692 {"addl.ob", "Y,Q", 0x78000437, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, SB1, MX, 0 }, 693 {"addl.qh", "Y,Q", 0x78200437, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, 0, MX, 0 }, 1600 {"mula.ob", "Y,Q", 0x78000033, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, SB1, MX, 0 }, 1601 {"mula.ob", "S,Q", 0x48000033, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, N54, 0, 0 }, 1602 {"mula.qh", "Y,Q", 0x78200033, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, 0, MX, 0 }, 1606 {"mull.ob", "Y,Q", 0x78000433, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, SB1, MX, 0 }, 1607 {"mull.ob", "S,Q", 0x48000433, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, N54, 0, 0 } [all...]
/src/external/gpl3/gdb.old/dist/opcodes/
mips-opc.c	274 #define WR_MACC INSN2_WRITE_MDMX_ACC 684 {"adda.ob", "Y,Q", 0x78000037, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, SB1, MX, 0 }, 685 {"adda.qh", "Y,Q", 0x78200037, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, 0, MX, 0 }, 691 {"addl.ob", "Y,Q", 0x78000437, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, SB1, MX, 0 }, 692 {"addl.qh", "Y,Q", 0x78200437, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, 0, MX, 0 }, 1595 {"mula.ob", "Y,Q", 0x78000033, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, SB1, MX, 0 }, 1596 {"mula.ob", "S,Q", 0x48000033, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, N54, 0, 0 }, 1597 {"mula.qh", "Y,Q", 0x78200033, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, 0, MX, 0 }, 1601 {"mull.ob", "Y,Q", 0x78000433, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, SB1, MX, 0 }, 1602 {"mull.ob", "S,Q", 0x48000433, 0xfc2007ff, RD_1\|RD_2\|FP_D, WR_MACC, N54, 0, 0 } [all...]

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