| /src/external/gpl3/binutils/dist/opcodes/ |
| ppc-opc.c | 4624 #define XBF_MASK (X_MASK | (3 << 21))
4742 /* An XBF_MASK with the RA and RB fields fixed. */
4743 #define XBFRARB_MASK (XBF_MASK | RA_MASK | RB_MASK)
5231 {"ps_cmpu0", X (4, 0), XBF_MASK, PPCPS, 0, {BF, FRA, FRB}},
5325 {"ps_cmpo0", X (4, 32), XBF_MASK, PPCPS, 0, {BF, FRA, FRB}},
5349 {"ps_cmpu1", X (4, 64), XBF_MASK, PPCPS, 0, {BF, FRA, FRB}},
5367 {"ps_cmpo1", X (4, 96), XBF_MASK, PPCPS, 0, {BF, FRA, FRB}},
9673 {"fcmpu", X(63,0), XBF_MASK, COM, PPCEFS|PPCVLE, {BF, FRA, FRB}},
9759 {"fcmpo", X(63,32), XBF_MASK, COM, PPCEFS|PPCVLE, {BF, FRA, FRB}},
9802 {"ftdiv", X(63,128), XBF_MASK, POWER7, PPCVLE, {BF, FRA, FRB}}
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| ppc-opc.c | 4614 #define XBF_MASK (X_MASK | (3 << 21))
4726 /* An XBF_MASK with the RA and RB fields fixed. */
4727 #define XBFRARB_MASK (XBF_MASK | RA_MASK | RB_MASK)
5215 {"ps_cmpu0", X (4, 0), XBF_MASK, PPCPS, 0, {BF, FRA, FRB}},
5308 {"ps_cmpo0", X (4, 32), XBF_MASK, PPCPS, 0, {BF, FRA, FRB}},
5331 {"ps_cmpu1", X (4, 64), XBF_MASK, PPCPS, 0, {BF, FRA, FRB}},
5348 {"ps_cmpo1", X (4, 96), XBF_MASK, PPCPS, 0, {BF, FRA, FRB}},
9608 {"fcmpu", X(63,0), XBF_MASK, COM, PPCEFS|PPCVLE, {BF, FRA, FRB}},
9694 {"fcmpo", X(63,32), XBF_MASK, COM, PPCEFS|PPCVLE, {BF, FRA, FRB}},
9737 {"ftdiv", X(63,128), XBF_MASK, POWER7, PPCVLE, {BF, FRA, FRB}}
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| ppc-opc.c | 4506 #define XBF_MASK (X_MASK | (3 << 21))
4607 /* An XBF_MASK with the RA and RB fields fixed. */
4608 #define XBFRARB_MASK (XBF_MASK | RA_MASK | RB_MASK)
5096 {"ps_cmpu0", X (4, 0), XBF_MASK, PPCPS, 0, {BF, FRA, FRB}},
5189 {"ps_cmpo0", X (4, 32), XBF_MASK, PPCPS, 0, {BF, FRA, FRB}},
5212 {"ps_cmpu1", X (4, 64), XBF_MASK, PPCPS, 0, {BF, FRA, FRB}},
5229 {"ps_cmpo1", X (4, 96), XBF_MASK, PPCPS, 0, {BF, FRA, FRB}},
9468 {"fcmpu", X(63,0), XBF_MASK, COM, PPCEFS|PPCVLE, {BF, FRA, FRB}},
9554 {"fcmpo", X(63,32), XBF_MASK, COM, PPCEFS|PPCVLE, {BF, FRA, FRB}},
9597 {"ftdiv", X(63,128), XBF_MASK, POWER7, PPCVLE, {BF, FRA, FRB}}
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| ppc-opc.c | 4506 #define XBF_MASK (X_MASK | (3 << 21))
4607 /* An XBF_MASK with the RA and RB fields fixed. */
4608 #define XBFRARB_MASK (XBF_MASK | RA_MASK | RB_MASK)
5096 {"ps_cmpu0", X (4, 0), XBF_MASK, PPCPS, 0, {BF, FRA, FRB}},
5189 {"ps_cmpo0", X (4, 32), XBF_MASK, PPCPS, 0, {BF, FRA, FRB}},
5212 {"ps_cmpu1", X (4, 64), XBF_MASK, PPCPS, 0, {BF, FRA, FRB}},
5229 {"ps_cmpo1", X (4, 96), XBF_MASK, PPCPS, 0, {BF, FRA, FRB}},
9457 {"fcmpu", X(63,0), XBF_MASK, COM, PPCEFS|PPCVLE, {BF, FRA, FRB}},
9543 {"fcmpo", X(63,32), XBF_MASK, COM, PPCEFS|PPCVLE, {BF, FRA, FRB}},
9586 {"ftdiv", X(63,128), XBF_MASK, POWER7, PPCVLE, {BF, FRA, FRB}}
[all...] |
