| /src/external/gpl3/binutils/dist/opcodes/ |
| ppc-opc.c | 4947 #define XSPR(op, xop, spr) \
7726 {"mfexisr", XSPR(31,323, 64), XSPR_MASK, PPC403, 0, {RT}},
7727 {"mfexier", XSPR(31,323, 66), XSPR_MASK, PPC403, 0, {RT}},
7728 {"mfbr0", XSPR(31,323,128), XSPR_MASK, PPC403, 0, {RT}},
7729 {"mfbr1", XSPR(31,323,129), XSPR_MASK, PPC403, 0, {RT}},
7730 {"mfbr2", XSPR(31,323,130), XSPR_MASK, PPC403, 0, {RT}},
7731 {"mfbr3", XSPR(31,323,131), XSPR_MASK, PPC403, 0, {RT}},
7732 {"mfbr4", XSPR(31,323,132), XSPR_MASK, PPC403, 0, {RT}},
7733 {"mfbr5", XSPR(31,323,133), XSPR_MASK, PPC403, 0, {RT}},
7734 {"mfbr6", XSPR(31,323,134), XSPR_MASK, PPC403, 0, {RT}}
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| ppc-opc.c | 4931 #define XSPR(op, xop, spr) \
7694 {"mfexisr", XSPR(31,323, 64), XSPR_MASK, PPC403, 0, {RT}},
7695 {"mfexier", XSPR(31,323, 66), XSPR_MASK, PPC403, 0, {RT}},
7696 {"mfbr0", XSPR(31,323,128), XSPR_MASK, PPC403, 0, {RT}},
7697 {"mfbr1", XSPR(31,323,129), XSPR_MASK, PPC403, 0, {RT}},
7698 {"mfbr2", XSPR(31,323,130), XSPR_MASK, PPC403, 0, {RT}},
7699 {"mfbr3", XSPR(31,323,131), XSPR_MASK, PPC403, 0, {RT}},
7700 {"mfbr4", XSPR(31,323,132), XSPR_MASK, PPC403, 0, {RT}},
7701 {"mfbr5", XSPR(31,323,133), XSPR_MASK, PPC403, 0, {RT}},
7702 {"mfbr6", XSPR(31,323,134), XSPR_MASK, PPC403, 0, {RT}}
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| ppc-opc.c | 4812 #define XSPR(op, xop, spr) \
7575 {"mfexisr", XSPR(31,323, 64), XSPR_MASK, PPC403, 0, {RT}},
7576 {"mfexier", XSPR(31,323, 66), XSPR_MASK, PPC403, 0, {RT}},
7577 {"mfbr0", XSPR(31,323,128), XSPR_MASK, PPC403, 0, {RT}},
7578 {"mfbr1", XSPR(31,323,129), XSPR_MASK, PPC403, 0, {RT}},
7579 {"mfbr2", XSPR(31,323,130), XSPR_MASK, PPC403, 0, {RT}},
7580 {"mfbr3", XSPR(31,323,131), XSPR_MASK, PPC403, 0, {RT}},
7581 {"mfbr4", XSPR(31,323,132), XSPR_MASK, PPC403, 0, {RT}},
7582 {"mfbr5", XSPR(31,323,133), XSPR_MASK, PPC403, 0, {RT}},
7583 {"mfbr6", XSPR(31,323,134), XSPR_MASK, PPC403, 0, {RT}}
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| ppc-opc.c | 4812 #define XSPR(op, xop, spr) \
7575 {"mfexisr", XSPR(31,323, 64), XSPR_MASK, PPC403, 0, {RT}},
7576 {"mfexier", XSPR(31,323, 66), XSPR_MASK, PPC403, 0, {RT}},
7577 {"mfbr0", XSPR(31,323,128), XSPR_MASK, PPC403, 0, {RT}},
7578 {"mfbr1", XSPR(31,323,129), XSPR_MASK, PPC403, 0, {RT}},
7579 {"mfbr2", XSPR(31,323,130), XSPR_MASK, PPC403, 0, {RT}},
7580 {"mfbr3", XSPR(31,323,131), XSPR_MASK, PPC403, 0, {RT}},
7581 {"mfbr4", XSPR(31,323,132), XSPR_MASK, PPC403, 0, {RT}},
7582 {"mfbr5", XSPR(31,323,133), XSPR_MASK, PPC403, 0, {RT}},
7583 {"mfbr6", XSPR(31,323,134), XSPR_MASK, PPC403, 0, {RT}}
[all...] |
