| /src/external/gpl3/binutils/dist/opcodes/ |
| ppc-opc.c | 4112 #define P_GER_MASK ((-1ULL << 40) | XX3ACC_MASK)
4689 #define XX3ACC_MASK (XX3_MASK | (3 << 21) | 1)
4690 #define XX3DMR_MASK (XX3ACC_MASK | (1 << 11))
4692 #define XX3GERX_MASK (XX3ACC_MASK | (1 << 16))
9209 {"dmxvi8ger4pp",XX3(59,2), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9210 {"xvi8ger4pp", XX3(59,2), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9211 {"dmxvi8ger4", XX3(59,3), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9212 {"xvi8ger4", XX3(59,3), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9266 {"dmxvf16ger2pp",XX3(59,18), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9267 {"xvf16ger2pp", XX3(59,18), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}}
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| ppc-opc.c | 4111 #define P_GER_MASK ((-1ULL << 40) | XX3ACC_MASK)
4673 #define XX3ACC_MASK (XX3_MASK | (3 << 21) | 1)
4674 #define XX3DMR_MASK (XX3ACC_MASK | (1 << 11))
4676 #define XX3GERX_MASK (XX3ACC_MASK | (1 << 16))
9144 {"dmxvi8ger4pp",XX3(59,2), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9145 {"xvi8ger4pp", XX3(59,2), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9146 {"dmxvi8ger4", XX3(59,3), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9147 {"xvi8ger4", XX3(59,3), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9201 {"dmxvf16ger2pp",XX3(59,18), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9202 {"xvf16ger2pp", XX3(59,18), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}}
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| ppc-opc.c | 4021 #define P_GER_MASK ((-1ULL << 40) | XX3ACC_MASK)
4565 #define XX3ACC_MASK (XX3_MASK | (3 << 21) | 1)
4566 #define XX3DMR_MASK (XX3ACC_MASK | (1 << 11))
4568 #define XX3GERX_MASK (XX3ACC_MASK | (1 << 16))
9025 {"dmxvi8ger4pp",XX3(59,2), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9026 {"xvi8ger4pp", XX3(59,2), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9027 {"dmxvi8ger4", XX3(59,3), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9028 {"xvi8ger4", XX3(59,3), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9082 {"dmxvf16ger2pp",XX3(59,18), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9083 {"xvf16ger2pp", XX3(59,18), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}}
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| ppc-opc.c | 4021 #define P_GER_MASK ((-1ULL << 40) | XX3ACC_MASK)
4565 #define XX3ACC_MASK (XX3_MASK | (3 << 21) | 1)
4566 #define XX3DMR_MASK (XX3ACC_MASK | (1 << 11))
4568 #define XX3GERX_MASK (XX3ACC_MASK | (1 << 16))
9025 {"dmxvi8ger4pp",XX3(59,2), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9026 {"xvi8ger4pp", XX3(59,2), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9027 {"dmxvi8ger4", XX3(59,3), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9028 {"xvi8ger4", XX3(59,3), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9082 {"dmxvf16ger2pp",XX3(59,18), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}},
9083 {"xvf16ger2pp", XX3(59,18), XX3ACC_MASK, POWER10, PPCVLE, {ACC, XA6a, XB6a}}
[all...] |
