| /src/external/gpl3/binutils/dist/opcodes/ |
| alpha-opc.c | 226 #define ZB (ZA + 1)
228 #define ZC (ZB + 1)
488 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
490 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
566 { "nop", OPR(0x11,0x20), BASE, { ZA, ZB, ZC } }, /* pseudo */
567 { "clr", OPR(0x11,0x20), BASE, { ZA, ZB, RC } }, /* pseudo */
666 { "itofs", FP(0x14,0x004), CIX, { RA, ZB, FC } },
669 { "itoff", FP(0x14,0x014), CIX, { RA, ZB, FC } },
670 { "itoft", FP(0x14,0x024), CIX, { RA, ZB, FC } },
1023 { "fnop", FP(0x17,0x020), BASE, { ZA, ZB, ZC } }, /* pseudo *
[all...] |
| arc-opc.c | 1923 #define ZB (LIMMdup + 1)
|
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| alpha-opc.c | 226 #define ZB (ZA + 1)
228 #define ZC (ZB + 1)
488 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
490 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
566 { "nop", OPR(0x11,0x20), BASE, { ZA, ZB, ZC } }, /* pseudo */
567 { "clr", OPR(0x11,0x20), BASE, { ZA, ZB, RC } }, /* pseudo */
666 { "itofs", FP(0x14,0x004), CIX, { RA, ZB, FC } },
669 { "itoff", FP(0x14,0x014), CIX, { RA, ZB, FC } },
670 { "itoft", FP(0x14,0x024), CIX, { RA, ZB, FC } },
1023 { "fnop", FP(0x17,0x020), BASE, { ZA, ZB, ZC } }, /* pseudo *
[all...] |
| arc-opc.c | 1923 #define ZB (LIMMdup + 1)
|
| /src/external/gpl3/gdb/dist/opcodes/ |
| alpha-opc.c | 226 #define ZB (ZA + 1)
228 #define ZC (ZB + 1)
488 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
490 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
566 { "nop", OPR(0x11,0x20), BASE, { ZA, ZB, ZC } }, /* pseudo */
567 { "clr", OPR(0x11,0x20), BASE, { ZA, ZB, RC } }, /* pseudo */
666 { "itofs", FP(0x14,0x004), CIX, { RA, ZB, FC } },
669 { "itoff", FP(0x14,0x014), CIX, { RA, ZB, FC } },
670 { "itoft", FP(0x14,0x024), CIX, { RA, ZB, FC } },
1023 { "fnop", FP(0x17,0x020), BASE, { ZA, ZB, ZC } }, /* pseudo *
[all...] |
| arc-opc.c | 1923 #define ZB (LIMMdup + 1)
|
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| alpha-opc.c | 226 #define ZB (ZA + 1)
228 #define ZC (ZB + 1)
488 { "lda", MEM(0x08), BASE, { RA, MDISP, ZB } }, /* pseudo */
490 { "ldah", MEM(0x09), BASE, { RA, MDISP, ZB } }, /* pseudo */
566 { "nop", OPR(0x11,0x20), BASE, { ZA, ZB, ZC } }, /* pseudo */
567 { "clr", OPR(0x11,0x20), BASE, { ZA, ZB, RC } }, /* pseudo */
666 { "itofs", FP(0x14,0x004), CIX, { RA, ZB, FC } },
669 { "itoff", FP(0x14,0x014), CIX, { RA, ZB, FC } },
670 { "itoft", FP(0x14,0x024), CIX, { RA, ZB, FC } },
1023 { "fnop", FP(0x17,0x020), BASE, { ZA, ZB, ZC } }, /* pseudo *
[all...] |
| arc-opc.c | 1923 #define ZB (LIMMdup + 1)
|
