Home | History | Annotate | Line # | Download | only in pci 
      1 /*	$NetBSD: p5membar.c,v 1.5 2023/12/20 00:40:42 thorpej Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2012 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Radoslaw Kujawa.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 /*
     33  * Handle autoconfigured PCI resources on some revisions of CyberVision PPC,
     34  * BlizzardVision PPC graphics cards and all G-REX PCI busboards.
     35  */
     36 
     37 #include <sys/types.h>
     38 #include <sys/param.h>
     39 #include <sys/time.h>
     40 #include <sys/systm.h>
     41 #include <sys/errno.h>
     42 #include <sys/device.h>
     43 
     44 #include <uvm/uvm_extern.h>
     45 
     46 #include <machine/bus.h>
     47 #include <machine/cpu.h>
     48 
     49 #include <m68k/bus_dma.h>
     50 #include <amiga/dev/zbusvar.h>
     51 #include <amiga/pci/p5pbreg.h>
     52 #include <amiga/pci/p5pbvar.h>
     53 #include <amiga/pci/p5membarvar.h>
     54 
     55 /* Zorro IDs */
     56 #define ZORRO_MANID_P5		8512
     57 #define ZORRO_PRODID_P5PB	101		/* CVPPC/BVPPC/G-REX */
     58 
     59 static int	p5membar_match(device_t, cfdata_t, void *);
     60 static void	p5membar_attach(device_t, device_t, void *);
     61 
     62 CFATTACH_DECL_NEW(p5membar, sizeof(struct p5membar_softc),
     63     p5membar_match, p5membar_attach, NULL, NULL);
     64 
     65 static int
     66 p5membar_match(device_t parent, cfdata_t cf, void *aux)
     67 {
     68 	struct zbus_args *zap;
     69 
     70 	zap = aux;
     71 
     72 	if (zap->manid != ZORRO_MANID_P5)
     73 		return 0;
     74 
     75 	if (zap->prodid != ZORRO_PRODID_P5PB)
     76 		return 0;
     77 
     78 	return 1;
     79 }
     80 
     81 static void
     82 p5membar_attach(device_t parent, device_t self, void *aux)
     83 {
     84 	struct zbus_args *zap;
     85 	struct p5membar_softc *sc;
     86 
     87 	sc = device_private(self);
     88 	zap = aux;
     89 
     90 	sc->sc_dev = self;
     91 	sc->sc_base = zap->pa;
     92 	sc->sc_size = zap->size;
     93 
     94 	if ((bus_addr_t) zap->pa == P5BUS_PCI_CONF_BASE) {
     95 		aprint_normal(": PCI config area, %d kB\n",
     96 		    zap->size / 1024);
     97 		sc->sc_type = P5MEMBAR_TYPE_INTERNAL;
     98 	} else if ((bus_addr_t) zap->pa == P5BUS_PCI_IO_BASE) {
     99 		aprint_normal(": PCI I/O area, %d kB\n",
    100 		    zap->size / 1024);
    101 		sc->sc_type = P5MEMBAR_TYPE_INTERNAL;
    102 	} else if ((bus_addr_t) zap->pa == P5BUS_BRIDGE_BASE) {
    103 		aprint_normal(": PCI bridge, %d kB\n",
    104 		    zap->size / 1024);
    105 		sc->sc_type = P5MEMBAR_TYPE_INTERNAL;
    106 	} else {
    107 		aprint_normal(": PCI memory BAR, %d kB\n",
    108 		    zap->size / 1024);
    109 		sc->sc_type = P5MEMBAR_TYPE_MEMORY;
    110 	}
    111 
    112 	/*
    113 	 * Do nothing here, p5pb should find the p5membar devices
    114 	 * and do the right(tm) thing.
    115 	 */
    116 
    117 }
    118 
    119