1 /* $NetBSD: zxreg.h,v 1.7 2009/04/23 20:46:49 macallan Exp $ */ 2 3 /* 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Copyright (C) 1999, 2000 Jakub Jelinek (jakub (at) redhat.com) 34 * 35 * Permission is hereby granted, free of charge, to any person obtaining a copy 36 * of this software and associated documentation files (the "Software"), to deal 37 * in the Software without restriction, including without limitation the rights 38 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 39 * copies of the Software, and to permit persons to whom the Software is 40 * furnished to do so, subject to the following conditions: 41 * 42 * The above copyright notice and this permission notice shall be included in 43 * all copies or substantial portions of the Software. 44 * 45 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 46 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 47 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 48 * JAKUB JELINEK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 49 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 50 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 51 * 52 */ 53 54 #ifndef _DEV_SBUS_ZXREG_H_ 55 #define _DEV_SBUS_ZXREG_H_ 56 57 /* Hardware offsets. */ 58 #define ZX_OFF_UNK2 0x00000000 59 #define ZX_OFF_LC_SS0_KRN 0x00200000 60 #define ZX_OFF_LC_SS0_USR 0x00201000 61 #define ZX_OFF_LD_SS0 0x00400000 62 #define ZX_OFF_LD_GBL 0x00401000 63 #define ZX_OFF_LX_CROSS 0x00600000 64 #define ZX_OFF_LX_CURSOR 0x00601000 65 #define ZX_OFF_UNK 0x00602000 66 #define ZX_OFF_SS0 0x00800000 67 #define ZX_OFF_LC_SS1_KRN 0x01200000 68 #define ZX_OFF_LC_SS1_USR 0x01201000 69 #define ZX_OFF_LD_SS1 0x01400000 70 #define ZX_OFF_SS1 0x01800000 71 72 /* offsets relative to ZX_OFF_LC_SS0_KRN */ 73 /* Leo clock domain */ 74 #define ZX_LC_SS0_LEO_INT_ENABLE 0x00000000 75 #define ZX_LC_SS0_CLR_BLIT_DONE 0x00000004 76 #define ZX_LC_SS0_CLR_DEODRAW_SEM 0x00000008 77 78 /* SBus clock domain */ 79 #define ZX_LC_SS0_CHIP_CODE 0x00000800 80 #define ZX_LC_SS0_SBUS_STATUS 0x00000804 81 #define ZX_LC_SS0_SBUS_INT_ENABLE 0x00000808 82 #define ZX_LC_SS0_FIRST_TIMEOUT_CNTR 0x0000080c 83 #define ZX_LC_SS0_RERUN_CNTR 0x00000810 84 #define ZX_LC_SS0_CLR_READ_DMA_DONE 0x00000820 85 #define ZX_LC_SS0_CLR_WRITE_DMA_DONE 0x00000824 86 #define ZX_LC_SS0_CLR_INVALID_PTE 0x00000828 87 #define ZX_LC_SS0_CLR_DMA_ERROR_ACK 0x0000082c 88 #define ZX_LC_SS0_CLR_SLAVE_ILL_ADDR 0x00000830 89 #define ZX_LC_SS0_CLR_SLAVE_RERUN_TOUT 0x00000834 90 #define ZX_LC_SS0_LEO_RESET 0x00000840 91 #define ZX_LC_SS0_CLR_LEO_RESET 0x00000844 92 #define ZX_LC_SS0_DMA_READ_PAUSE 0x00000848 93 94 /* Leo clock domain */ 95 #define ZX_LC_SS0_LEO_SYSTEM_STATUS 0x00001000 96 #define ZX_LC_SS0_FB_ADDRESS_SPACE 0x00001004 97 #define ZX_LC_SS0_STENCIL_MASK 0x00001008 98 #define ZX_LC_SS0_STENCIL_TRANSPARENT 0x0000100c 99 #define ZX_LC_SS0_DIRECTION_SIZE 0x00001010 100 #define ZX_LC_SS0_SOURCE_ADDR 0x00001014 101 #define ZX_LC_SS0_DEST_COPY_NOSTART 0x00001018 102 #define ZX_LC_SS0_DEST_COPY_START 0x0000101c 103 #define ZX_LC_SS0_DEST_FILL_START 0x00001020 104 105 /* ROP register */ 106 #define ZX_ATTR_PICK_DISABLE 0x00000000 107 #define ZX_ATTR_PICK_2D 0x80000000 108 #define ZX_ATTR_PICK_3D 0xa0000000 109 #define ZX_ATTR_PICK_2D_REND 0xc0000000 110 #define ZX_ATTR_PICK_3D_REND 0xe0000000 111 112 #define ZX_ATTR_DCE_DISABLE 0x00000000 113 #define ZX_ATTR_DCE_ENABLE 0x10000000 114 115 #define ZX_ATTR_APE_DISABLE 0x00000000 116 #define ZX_ATTR_APE_ENABLE 0x08000000 117 118 #define ZX_ATTR_COLOR_VAR 0x00000000 119 #define ZX_ATTR_COLOR_CONST 0x04000000 120 121 #define ZX_ATTR_AA_DISABLE 0x02000000 122 #define ZX_ATTR_AA_ENABLE 0x01000000 123 124 #define ZX_ATTR_ABE_BG 0x00000000 /* dst + alpha * (src - bg) */ 125 #define ZX_ATTR_ABE_FB 0x00800000 /* dst + alpha * (src - dst) */ 126 127 #define ZX_ATTR_ABE_DISABLE 0x00000000 128 #define ZX_ATTR_ABE_ENABLE 0x00400000 129 130 #define ZX_ATTR_BLTSRC_A 0x00000000 131 #define ZX_ATTR_BLTSRC_B 0x00200000 132 133 #define ZX_ROP_ZERO (0x0 << 18) 134 #define ZX_ROP_NEW_AND_OLD (0x8 << 18) 135 #define ZX_ROP_NEW_AND_NOLD (0x4 << 18) 136 #define ZX_ROP_NEW (0xc << 18) 137 #define ZX_ROP_NNEW_AND_OLD (0x2 << 18) 138 #define ZX_ROP_OLD (0xa << 18) 139 #define ZX_ROP_NEW_XOR_OLD (0x6 << 18) 140 #define ZX_ROP_NEW_OR_OLD (0xe << 18) 141 #define ZX_ROP_NNEW_AND_NOLD (0x1 << 18) 142 #define ZX_ROP_NNEW_XOR_NOLD (0x9 << 18) 143 #define ZX_ROP_NOLD (0x5 << 18) 144 #define ZX_ROP_NEW_OR_NOLD (0xd << 18) 145 #define ZX_ROP_NNEW (0x3 << 18) 146 #define ZX_ROP_NNEW_OR_OLD (0xb << 18) 147 #define ZX_ROP_NNEW_OR_NOLD (0x7 << 18) 148 #define ZX_ROP_ONES (0xf << 18) 149 150 #define ZX_ATTR_HSR_DISABLE 0x00000000 151 #define ZX_ATTR_HSR_ENABLE 0x00020000 152 153 #define ZX_ATTR_WRITEZ_DISABLE 0x00000000 154 #define ZX_ATTR_WRITEZ_ENABLE 0x00010000 155 156 #define ZX_ATTR_Z_VAR 0x00000000 157 #define ZX_ATTR_Z_CONST 0x00008000 158 159 #define ZX_ATTR_WCLIP_DISABLE 0x00000000 160 #define ZX_ATTR_WCLIP_ENABLE 0x00004000 161 162 #define ZX_ATTR_MONO 0x00000000 163 #define ZX_ATTR_STEREO_LEFT 0x00001000 164 #define ZX_ATTR_STEREO_RIGHT 0x00003000 165 166 #define ZX_ATTR_WE_DISABLE 0x00000000 167 #define ZX_ATTR_WE_ENABLE 0x00000800 168 169 #define ZX_ATTR_FCE_DISABLE 0x00000000 170 #define ZX_ATTR_FCE_ENABLE 0x00000400 171 172 #define ZX_ATTR_RE_DISABLE 0x00000000 173 #define ZX_ATTR_RE_ENABLE 0x00000200 174 175 #define ZX_ATTR_GE_DISABLE 0x00000000 176 #define ZX_ATTR_GE_ENABLE 0x00000100 177 178 #define ZX_ATTR_BE_DISABLE 0x00000000 179 #define ZX_ATTR_BE_ENABLE 0x00000080 180 181 #define ZX_ATTR_RGBE_DISABLE 0x00000000 182 #define ZX_ATTR_RGBE_ENABLE 0x00000380 183 184 #define ZX_ATTR_OE_DISABLE 0x00000000 185 #define ZX_ATTR_OE_ENABLE 0x00000040 186 187 #define ZX_ATTR_ZE_DISABLE 0x00000000 188 #define ZX_ATTR_ZE_ENABLE 0x00000020 189 190 #define ZX_ATTR_FORCE_WID 0x00000010 191 192 #define ZX_ATTR_FC_PLANE_MASK 0x0000000e 193 194 #define ZX_ATTR_BUFFER_A 0x00000000 195 #define ZX_ATTR_BUFFER_B 0x00000001 196 197 /* CSR */ 198 #define ZX_CSR_BLT_BUSY 0x20000000 199 200 /* draw ss0 ss1 */ 201 #define zd_csr 0x0e00 202 #define zd_wid 0x0e04 203 #define zd_wmask 0x0e08 204 #define zd_widclip 0x0e0c 205 #define zd_vclipmin 0x0e10 206 #define zd_vclipmax 0x0e14 207 #define zd_pickmin 0x0e18 /* SS1 only */ 208 #define zd_pickmax 0x0e1c /* SS1 only */ 209 #define zd_fg 0x0e20 210 #define zd_bg 0x0e24 211 #define zd_src 0x0e28 /* Copy/Scroll (SS0 only) */ 212 #define zd_dst 0x0e2c /* Copy/Scroll/Fill (SS0 only) */ 213 #define zd_extent 0x0e30 /* Copy/Scroll/Fill size (SS0 only) */ 214 215 #define zd_setsem 0x0e40 /* SS1 only */ 216 #define zd_clrsem 0x0e44 /* SS1 only */ 217 #define zd_clrpick 0x0e48 /* SS1 only */ 218 #define zd_clrdat 0x0e4c /* SS1 only */ 219 #define zd_alpha 0x0e50 /* SS1 only */ 220 221 #define zd_winbg 0x0e80 222 #define zd_planemask 0x0e84 223 #define zd_rop 0x0e88 224 #define zd_z 0x0e8c 225 #define zd_dczf 0x0e90 /* SS1 only */ 226 #define zd_dczb 0x0e94 /* SS1 only */ 227 #define zd_dcs 0x0e98 /* SS1 only */ 228 #define zd_dczs 0x0e9c /* SS1 only */ 229 #define zd_pickfb 0x0ea0 /* SS1 only */ 230 #define zd_pickbb 0x0ea4 /* SS1 only */ 231 #define zd_dcfc 0x0ea8 /* SS1 only */ 232 #define zd_forcecol 0x0eac /* SS1 only */ 233 #define zd_door0 0x0eb0 /* SS1 only */ 234 #define zd_door1 0x0eb4 /* SS1 only */ 235 #define zd_door2 0x0eb8 /* SS1 only */ 236 #define zd_door3 0x0ebc /* SS1 only */ 237 #define zd_door4 0x0ec0 /* SS1 only */ 238 #define zd_door5 0x0ec4 /* SS1 only */ 239 #define zd_door6 0x0ec8 /* SS1 only */ 240 #define zd_door7 0x0ecc /* SS1 only */ 241 #define zd_pick0 0x0ed0 /* SS1 only */ 242 #define zd_pick1 0x0ed4 /* SS1 only */ 243 #define zd_pick2 0x0ed8 /* SS1 only */ 244 #define zd_pick3 0x0edc /* SS1 only */ 245 #define zd_pick4 0x0ee0 /* SS1 only */ 246 247 #define zd_misc 0x0ef4 /* SS1 only */ 248 249 #define ZX_SS1_MISC_ENABLE 0x00000001 250 #define ZX_SS1_MISC_STEREO 0x00000002 251 252 #define ZX_ADDRSPC_OBGR 0x00 253 #define ZX_ADDRSPC_Z 0x01 254 #define ZX_ADDRSPC_W 0x02 255 #define ZX_ADDRSPC_FONT_OBGR 0x04 256 #define ZX_ADDRSPC_FONT_Z 0x05 257 #define ZX_ADDRSPC_FONT_W 0x06 258 #define ZX_ADDRSPC_O 0x08 259 #define ZX_ADDRSPC_B 0x09 260 #define ZX_ADDRSPC_G 0x0a 261 #define ZX_ADDRSPC_R 0x0b 262 263 /* command */ 264 #define zc_csr 0x00 265 #define zc_addrspace 0x04 266 #define zc_fontmsk 0x08 267 #define zc_fontt 0x0c 268 #define zc_extent 0x10 269 #define zc_src 0x14 270 #define zc_dst 0x18 271 #define zc_copy 0x1c 272 #define zc_fill 0x20 273 274 #define ZX_CROSS_TYPE_CLUT0 0x00001000 275 #define ZX_CROSS_TYPE_CLUT1 0x00001001 276 #define ZX_CROSS_TYPE_CLUT2 0x00001002 277 #define ZX_CROSS_TYPE_WID 0x00001003 278 #define ZX_CROSS_TYPE_UNK 0x00001006 279 #define ZX_CROSS_TYPE_VIDEO 0x00002003 280 #define ZX_CROSS_TYPE_CLUTDATA 0x00004000 281 282 #define ZX_CROSS_CSR_ENABLE 0x00000008 283 #define ZX_CROSS_CSR_PROGRESS 0x00000004 284 #define ZX_CROSS_CSR_UNK 0x00000002 285 #define ZX_CROSS_CSR_UNK2 0x00000001 286 287 /* cross */ 288 #define zx_type 0x00 289 #define zx_csr 0x04 290 #define zx_value 0x08 291 292 /* cursor */ 293 #define zcu_type 0x10 294 #define zcu_misc 0x14 295 #define zcu_sxy 0x18 296 #define zcu_data 0x1c 297 298 #endif /* !_DEV_SBUS_ZXREG_H_ */ 299
Indexes created Thu Oct 02 14:10:14 GMT 2025