/src/sys/arch/sparc/sparc/ |
memreg.c | 218 hardmemerr4m(unsigned type, u_int sfsr, u_int sfva, u_int afsr, u_int afva) 226 if (afsr != 0) { 227 snprintb(bits, sizeof(bits), AFSR_BITS, afsr); 228 printf("; afsr=%s afva=0x%x%x\n", bits, 229 (afsr & AFSR_AFA) >> AFSR_AFA_RSHIFT, afva); 232 if ((sfsr & SFSR_FT) == SFSR_FT_NONE && (afsr & AFSR_AFO) == 0) 254 u_int afsr; local in function:hypersparc_memerr 259 (*cpuinfo.get_asyncflt)(&afsr, &afva); 260 if ((afsr & AFSR_AFO) != 0) { /* HS async fault! */ 263 (afsr & AFSR_AFA) >> AFSR_AFA_RSHIFT, afva) 284 u_int afsr=0; \/* No Async fault registers on the viking *\/ local in function:viking_memerr 333 u_int afsr; local in function:memerr4m [all...] |
intr.c | 218 u_int afsr, afva; local in function:nmi_hard 224 afsr = afva = 0; 225 if ((*cpuinfo.get_asyncflt)(&afsr, &afva) == 0) { 226 snprintb(bits, sizeof(bits), AFSR_BITS, afsr); 227 printf("Async registers (mid %d): afsr=%s; afva=0x%x%x\n", 229 (afsr & AFSR_AFA) >> AFSR_AFA_RSHIFT, afva); 448 uint32_t afsr, afar, mfsr, mfar; local in function:nmi_hard_msiiep 451 afsr = *(volatile uint32_t *)MSIIEP_AFSR; 456 if (afsr & MSIIEP_AFSR_ERR) { 457 snprintb(bits, sizeof(bits), MSIIEP_AFSR_BITS, afsr); [all...] |
/src/sys/arch/sparc/dev/ |
sbus.c | 604 uint32_t afsr, afva; local in function:sbus_error 609 afsr = bus_space_read_4(sc->sc_bustag, bh, SBUS_AFSR_REG); 611 snprintb(bits, sizeof(bits), SBUS_AFSR_BITS, afsr); 613 printf("\taddress: 0x%x%x\n", afsr & SBUS_AFSR_PAH, afva); 626 bus_space_write_4(sc->sc_bustag, bh, SBUS_AFSR_REG, afsr);
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vme_machdep.c | 452 uint32_t afsr, afpa; local in function:sparc_vme_error 455 afsr = sc->sc_reg->vmebus_afsr; 457 snprintb(bits, sizeof(bits), VMEBUS_AFSR_BITS, afsr); 459 printf("\taddress: 0x%x%x\n", afsr, afpa); 705 printf(" ICR_SI_PEND=0x%x; VME AFSR=0x%x; VME AFAR=0x%x\n",
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/src/sys/arch/sparc64/dev/ |
schizo.c | 395 u_int64_t afsr, afar, ctrl, tfar; local in function:schizo_pci_error 399 afsr = schizo_pbm_read(sp, SCZ_PCI_AFSR); 407 snprintb(bits, sizeof(bits), SCZ_PCIAFSR_BITS, afsr); 445 schizo_pbm_write(sp, SCZ_PCI_AFSR, afsr);
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psycho.c | 918 uint64_t afsr = regs->psy_ue_afsr; local in function:psycho_ue 926 snprintb(bits, sizeof(bits), PSYCHO_UE_AFSR_BITS, afsr); 928 "uncorrectable DMA error AFAR %" PRIx64 " AFSR %s\n", afar, bits); 955 "correctable DMA error AFAR %" PRIx64 " AFSR %" PRIx64 "\n", 970 panic("%s: PCI bus A error AFAR %" PRIx64 " AFSR %" PRIx64, 986 panic("%s: PCI bus B error AFAR %" PRIx64 " AFSR %" PRIx64,
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schizoreg.h | 49 volatile u_int64_t afsr; member in struct:schizo_pbm_regs 385 { 0x010030, 8, 0, 3, "UE AFSR" }, 387 { 0x010040, 8, 0, 3, "CE AFSR" }, 416 { 0x002010, 8, 0, 0x0303, "PCI AFSR" },
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/src/sys/arch/sparc64/sparc64/ |
trap.c | 1298 u_long afsr, vaddr_t sfva, u_long sfsr) 1371 printf("data error type %x sfsr=%lx sfva=%lx afsr=%lx afva=%lx tf=%p\n", 1372 type, sfsr, sfva, afsr, afva, tf); 1374 if (afsr == 0) { 1399 if (afsr & ASFR_PRIV) { 1402 snprintb(buf, sizeof(buf), AFSR_BITS, afsr); 1403 panic("Privileged Async Fault: AFAR %p AFSR %lx\n%s", 1404 (void *)afva, afsr, buf); 1568 u_long sfsr, vaddr_t afva, u_long afsr) 1618 if ((afsr) != 0) 1704 uint64_t eeer, afar, afsr; local in function:ecc_corrected_error [all...] |