| /src/sys/dev/ic/ |
| rtwphy.c | 345 uint32_t agc; local in function:rtw_sa2400_agc_init
347 agc = __SHIFTIN(25, SA2400_AGC_MAXGAIN_MASK);
348 agc |= __SHIFTIN(7, SA2400_AGC_BBPDELAY_MASK);
349 agc |= __SHIFTIN(15, SA2400_AGC_LNADELAY_MASK);
350 agc |= __SHIFTIN(27, SA2400_AGC_RXONDELAY_MASK);
353 agc);
|
| rt2661.c | 3028 int lna, agc, rssi; local in function:rt2661_get_rssi
3031 agc = raw & 0x1f;
3033 rssi = 2 * agc;
|
| rt2860.c | 2268 uint8_t agc; local in function:rt2860_select_chan_group
2344 /* set initial AGC value */
2347 agc = 0x1c + sc->lna[0] * 2;
2349 agc = 0x2e + sc->lna[0];
2352 agc = 0x22 + (sc->lna[group] * 5) / 3;
2354 agc = 0x32 + (sc->lna[group] * 5) / 3;
2356 rt2860_mcu_bbp_write(sc, 66, agc);
|
| /src/sys/dev/pci/ |
| if_alc.c | 474 uint16_t agc, len, val; local in function:alc_dsp_fixup
490 alc_miidbg_readreg(sc, MII_DBG_AGC, &agc);
491 agc &= DBG_AGC_2_VGA_MASK;
492 agc >>= DBG_AGC_2_VGA_SHIFT;
494 agc > DBG_AGC_LONG1G_LIMT) ||
496 agc > DBG_AGC_LONG1G_LIMT)) {
|
| if_iwireg.h | 250 uint8_t agc; /* automatic gain control */ member in struct:iwi_frame
|
| if_iwn.c | 3879 uint8_t mask, agc; local in function:iwn4965_get_rssi
3883 agc = (le16toh(phy->agc) >> 7) & 0x7f;
3893 return rssi - agc - IWN_RSSI_TO_DBM;
3900 uint8_t agc; local in function:iwn5000_get_rssi
3903 agc = (le32toh(phy->agc) >> 9) & 0x7f;
3909 return rssi - agc - IWN_RSSI_TO_DBM;
|
| if_wpireg.h | 225 uint8_t agc; /* access gain control */ member in struct:wpi_rx_stat
|
| if_iwnreg.h | 1226 uint16_t agc; member in struct:iwn4965_rx_phystat
1232 uint32_t agc; member in struct:iwn5000_rx_phystat
|
| /src/sys/dev/usb/ |
| if_run.c | 2832 uint8_t agc; local in function:run_select_chan_group
2955 /* set initial AGC value */
2958 agc = 0x1c + sc->lna[0] * 2;
2960 agc = 0x2e + sc->lna[0];
2963 agc = 0x22 + (sc->lna[group] * 5) / 3;
2965 agc = 0x32 + (sc->lna[group] * 5) / 3;
2967 run_set_agc(sc, agc);
3747 run_set_agc(struct run_softc *sc, uint8_t agc)
3755 run_bbp_write(sc, 66, agc);
3757 run_bbp_write(sc, 66, agc);
[all...] |
