| /src/external/gpl3/gcc/dist/gcc/config/rs6000/ |
| rs6000-p8swap.cc | 2254 rtx and_op = and_ops[i]; local
2255 rtx and_base = XEXP (and_op, 0);
2259 and_mask = XEXP (and_op, 1);
2334 rtx and_op = and_ops[i]; local
2335 rtx and_base = XEXP (and_op, 0);
2339 and_mask = XEXP (and_op, 1);
|
| rs6000.cc | 7709 rtx and_op = gen_rtx_AND (Pmode, element, num_ele_m1);
7710 emit_insn (gen_rtx_SET (base_tmp, and_op));
13075 rtx and_op;
13158 and_op = gen_rtx_AND (GET_MODE (scratch), op_reg, op1);
13160 rv = gen_rtvec (2, gen_rtx_SET (scratch, and_op), cc_clobber);
7697 rtx and_op = gen_rtx_AND (Pmode, element, num_ele_m1); local
13056 rtx and_op; local
|
| /src/external/gpl3/gcc.old/dist/gcc/config/rs6000/ |
| rs6000-p8swap.cc | 2252 rtx and_op = and_ops[i]; local
2253 rtx and_base = XEXP (and_op, 0);
2257 and_mask = XEXP (and_op, 1);
2332 rtx and_op = and_ops[i]; local
2333 rtx and_base = XEXP (and_op, 0);
2337 and_mask = XEXP (and_op, 1);
|
| rs6000.cc | 7634 rtx and_op = gen_rtx_AND (Pmode, element, num_ele_m1);
7635 emit_insn (gen_rtx_SET (base_tmp, and_op));
12690 rtx and_op;
12773 and_op = gen_rtx_AND (GET_MODE (scratch), op_reg, op1);
12775 rv = gen_rtvec (2, gen_rtx_SET (scratch, and_op), cc_clobber);
7622 rtx and_op = gen_rtx_AND (Pmode, element, num_ele_m1); local
12671 rtx and_op; local
|
| /src/external/gpl3/gcc/dist/gcc/config/frv/ |
| frv.cc | 5898 rtx and_op;
5902 and_op = gen_andcr (test_reg, cr, test_reg);
5904 and_op = gen_andncr (test_reg, cr, test_reg);
5906 frv_ifcvt_add_insn (and_op, insn, TRUE);
5840 rtx and_op; local
|
| /src/external/gpl3/gcc.old/dist/gcc/config/frv/ |
| frv.cc | 5896 rtx and_op;
5900 and_op = gen_andcr (test_reg, cr, test_reg);
5902 and_op = gen_andncr (test_reg, cr, test_reg);
5904 frv_ifcvt_add_insn (and_op, insn, TRUE);
5838 rtx and_op; local
|
