/src/sys/arch/arm/broadcom/ |
bcm2835_dmac.c | 58 uint8_t ch_index; member in struct:bcm_dmac_channel 154 ch->ch_index = index; 180 cs = DMAC_READ(sc, DMAC_CS(ch->ch_index)); 181 DMAC_WRITE(sc, DMAC_CS(ch->ch_index), cs); 184 ce = DMAC_READ(sc, DMAC_DEBUG(ch->ch_index)); 187 DMAC_WRITE(sc, DMAC_DEBUG(ch->ch_index), ce); 233 if (!fdtbus_intr_str(phandle, ch->ch_index, intrstr, sizeof(intrstr))) { 240 ch->ch_index); 241 ch->ch_ih = fdtbus_intr_establish_xname(phandle, ch->ch_index, ipl, 0, 245 "failed to establish interrupt for DMA%d and %s\n", ch->ch_index, [all...] |
/src/sys/arch/arm/ti/ |
ti_edma.c | 61 uint8_t ch_index; member in struct:edma_channel 148 ch->ch_index = idx; 307 KASSERT(ch->ch_index == drq); 319 if (ch->ch_index < 32) { 320 EDMA_WRITE(sc, EDMA_ICR_REG, __BIT(ch->ch_index)); 321 EDMA_WRITE(sc, EDMA_IESR_REG, __BIT(ch->ch_index)); 323 EDMA_WRITE(sc, EDMA_ICRH_REG, __BIT(ch->ch_index - 32)); 324 EDMA_WRITE(sc, EDMA_IESRH_REG, __BIT(ch->ch_index - 32)); 344 if (ch->ch_index < 32) { 345 EDMA_WRITE(sc, EDMA_IECR_REG, __BIT(ch->ch_index)); [all...] |
/src/sys/arch/arm/sunxi/ |
sun4i_dma.c | 106 uint8_t ch_index; member in struct:sun4idma_channel 223 DMA_WRITE(sc, NDMA_SRC_ADDR_REG(ch->ch_index), src); 224 DMA_WRITE(sc, NDMA_DEST_ADDR_REG(ch->ch_index), dst); 225 DMA_WRITE(sc, NDMA_BC_REG(ch->ch_index), req->dreq_segs[0].ds_len); 226 DMA_WRITE(sc, NDMA_CTRL_REG(ch->ch_index), cfg | NDMA_CTRL_LOAD); 264 DMA_WRITE(sc, DDMA_SRC_ADDR_REG(ch->ch_index), src); 265 DMA_WRITE(sc, DDMA_DEST_ADDR_REG(ch->ch_index), dst); 266 DMA_WRITE(sc, DDMA_BC_REG(ch->ch_index), req->dreq_segs[0].ds_len); 267 DMA_WRITE(sc, DDMA_PARA_REG(ch->ch_index), DDMA_PARA_VALUE); 268 DMA_WRITE(sc, DDMA_CTRL_REG(ch->ch_index), cfg | DDMA_CTRL_LOAD) [all...] |
sun6i_dma.c | 192 uint8_t ch_index; member in struct:sun6idma_channel 233 ((sc)->sc_dmamap->dm_segs[0].ds_addr + DESC_OFFS((chp)->ch_index, (n))) 285 uint8_t index = ch->ch_index; 368 DMA_WRITE(sc, DMA_MODE_REG(ch->ch_index), 372 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, DESC_OFFS(ch->ch_index, 0), 375 DMA_WRITE(sc, DMA_START_ADDR_REG(ch->ch_index), 377 DMA_WRITE(sc, DMA_EN_REG(ch->ch_index), DMA_EN_EN); 379 if ((DMA_READ(sc, DMA_EN_REG(ch->ch_index)) & DMA_EN_EN) == 0) { 381 "DMA Channel %u failed to start\n", ch->ch_index); 394 DMA_WRITE(sc, DMA_EN_REG(ch->ch_index), 0) [all...] |
/src/sys/dev/pci/ |
if_iwm.c | 2230 uint8_t ch_index = iwm_ch_id_to_ch_index(ch_id); local in function:iwm_channel_id_to_txp 2232 if (ch_index == 0xff) 2243 if (le16toh(txp_chg->max_channel_idx) >= ch_index)
|