| /src/external/gpl3/gdb/dist/sim/testsuite/bfin/ |
| x1.s | 11 checkreg r2, 0x40004000;
12 checkreg r3, 0;
17 checkreg r2, 0x28002800;
18 checkreg r3, 0x18001800;
21 checkreg r0, 0x20002000;
22 checkreg r1, 0x08000800;
29 checkreg r0, 0x80008000;
30 checkreg r1, 0x80008000;
33 checkreg r2, 0x80008000;
34 checkreg r3, 0x0
57 checkreg r2, 0x7fff7fff; label
58 checkreg r3, 0x2000e000; label
60 checkreg r4, 0x20002000 label
61 checkreg r5, 0x2000e000 label
66 checkreg r2, 0x7fff7fff; label
67 checkreg r3, 0x4000c000; label
69 checkreg r4, 0x80008000 label
70 checkreg r5, 0x4000c000 label
75 checkreg r2, 0x7ffe7ffe; label
76 checkreg r3, 0x0002fffe; label
[all...] |
| /src/external/gpl3/gdb.old/dist/sim/testsuite/bfin/ |
| x1.s | 11 checkreg r2, 0x40004000;
12 checkreg r3, 0;
17 checkreg r2, 0x28002800;
18 checkreg r3, 0x18001800;
21 checkreg r0, 0x20002000;
22 checkreg r1, 0x08000800;
29 checkreg r0, 0x80008000;
30 checkreg r1, 0x80008000;
33 checkreg r2, 0x80008000;
34 checkreg r3, 0x0
57 checkreg r2, 0x7fff7fff; label
58 checkreg r3, 0x2000e000; label
60 checkreg r4, 0x20002000 label
61 checkreg r5, 0x2000e000 label
66 checkreg r2, 0x7fff7fff; label
67 checkreg r3, 0x4000c000; label
69 checkreg r4, 0x80008000 label
70 checkreg r5, 0x4000c000 label
75 checkreg r2, 0x7ffe7ffe; label
76 checkreg r3, 0x0002fffe; label
[all...] |
| /src/sys/dev/pci/ |
| puc.c | 346 #define checkreg(val, index) \ macro
350 if (checkreg(vend, PUC_REG_VEND) &&
351 checkreg(prod, PUC_REG_PROD) &&
352 checkreg(svend, PUC_REG_SVEND) &&
353 checkreg(sprod, PUC_REG_SPROD))
357 #undef checkreg macro
|
