| /src/sys/arch/arc/arc/ |
| cpu.c | 74 struct cpu_info * const ci = curcpu(); local 76 ci->ci_dev = self; 77 device_set_private(self, ci);
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| /src/sys/arch/arm/arm/ |
| ast.c | 116 struct cpu_info * const ci = curcpu(); local 118 ci->ci_data.cpu_ntrap++; 120 KDASSERT(ci->ci_cpl == IPL_NONE);
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| /src/sys/arch/cobalt/cobalt/ |
| cpu.c | 59 struct cpu_info * const ci = curcpu(); local 61 ci->ci_dev = self; 62 device_set_private(self, ci);
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| /src/sys/arch/evbmips/evbmips/ |
| cpu.c | 64 struct cpu_info * const ci = curcpu(); local 66 ci->ci_dev = self; 67 device_set_private(self, ci); 70 ci->ci_cpu_freq / 1000000, 71 (ci->ci_cpu_freq % 1000000) / 10000, 72 ci->ci_cycles_per_hz, ci->ci_divisor_delay); 76 cpu_attach_common(self, ci);
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| interrupt.c | 53 struct cpu_info * const ci = curcpu(); local 56 const int mtx_count = ci->ci_mtx_count; 57 const u_int biglock_count = ci->ci_biglock_count; 60 KASSERT(ci->ci_cpl == IPL_HIGH); 63 ci->ci_data.cpu_nintr++; 70 KASSERTMSG(ci->ci_cpl == ipl, 71 "%s: cpl (%d) != ipl (%d)", __func__, ci->ci_cpl, ipl); 77 .intr = (ci->ci_idepth > 1) 96 KASSERT(biglock_count == ci->ci_biglock_count); 98 KASSERT(mtx_count == ci->ci_mtx_count) [all...] |
| /src/sys/arch/hpcmips/hpcmips/ |
| cpu.c | 93 struct cpu_info * const ci = curcpu(); local 95 ci->ci_dev = self; 96 device_set_private(self, ci);
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| /src/sys/arch/mipsco/mipsco/ |
| cpu.c | 66 struct cpu_info * const ci = curcpu(); local 68 ci->ci_dev = self; 69 device_set_private(self, ci);
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| /src/sys/arch/newsmips/newsmips/ |
| cpu.c | 66 struct cpu_info * const ci = curcpu(); local 68 ci->ci_dev = self; 69 device_set_private(self, ci);
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| /src/sys/arch/pmax/pmax/ |
| cpu.c | 66 struct cpu_info * const ci = curcpu(); local 68 ci->ci_dev = self; 69 device_set_private(self, ci);
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| /src/sys/arch/rs6000/rs6000/ |
| cpu.c | 66 struct cpu_info *ci; local 68 ci = cpu_attach_common(self, 0); 69 if (ci == NULL)
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| /src/sys/arch/ews4800mips/ews4800mips/ |
| cpu.c | 66 struct cpu_info * const ci = curcpu(); local 68 ci->ci_dev = self; 69 device_set_private(self, ci);
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| /src/sys/arch/arm/cortex/ |
| gic_splfuncs.c | 54 struct cpu_info * const ci = curcpu(); local 55 const int oldipl = ci->ci_cpl; 56 KASSERT(panicstr || newipl <= ci->ci_cpl); 57 if (newipl < ci->ci_cpl) { 59 ci->ci_intr_depth++; 61 ci->ci_intr_depth--; 74 struct cpu_info *ci = curcpu(); local 77 if (newipl >= ci->ci_cpl) { 82 ci->ci_intr_depth++; 84 ci->ci_intr_depth-- [all...] |
| /src/sys/arch/arm/pic/ |
| pic_splfuncs.c | 55 struct cpu_info * const ci = curcpu(); local 56 const int oldipl = ci->ci_cpl; 58 if (newipl > ci->ci_cpl) { 59 pic_set_priority(ci, newipl); 67 struct cpu_info * const ci = curcpu(); local 68 const int oldipl = ci->ci_cpl; 69 KASSERT(panicstr || newipl <= ci->ci_cpl); 70 if (newipl < ci->ci_cpl) { 72 ci->ci_intr_depth++; 74 ci->ci_intr_depth-- 85 struct cpu_info * const ci = curcpu(); local [all...] |
| /src/sys/arch/bebox/bebox/ |
| ipi_bebox.c | 57 struct cpu_info * const ci = curcpu(); local 66 if (target == IPI_DST_ALL || dst_ci != ci) {
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| /src/sys/arch/epoc32/epoc32/ |
| intr.c | 46 struct cpu_info * const ci = curcpu(); local 47 const int oldipl = ci->ci_cpl; 51 ci->ci_data.cpu_nintr++;
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| /src/sys/arch/ia64/ia64/ |
| clock.c | 61 struct cpu_info *ci = curcpu(); local 63 ci->ci_clockadj = 0; 64 ci->ci_clock = ia64_get_itc(); 65 ia64_set_itm(ci->ci_clock + ia64_clock_reload);
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| /src/sys/arch/mips/mips/ |
| mips3_clockintr.c | 68 struct cpu_info * const ci = curcpu(); local 71 ci->ci_ev_count_compare.ev_count++; 73 KASSERT((ci->ci_cycles_per_hz & ~(0xffffffff)) == 0); 74 ci->ci_next_cp0_clk_intr += (uint32_t)(ci->ci_cycles_per_hz & 0xffffffff); 75 mips3_cp0_compare_write(ci->ci_next_cp0_clk_intr); 84 if ((ci->ci_next_cp0_clk_intr - new_cnt) & 0x80000000) { 86 ci->ci_next_cp0_clk_intr = new_cnt + curcpu()->ci_cycles_per_hz; 87 mips3_cp0_compare_write(ci->ci_next_cp0_clk_intr); 106 struct cpu_info * const ci = curcpu() local [all...] |
| /src/sys/arch/powerpc/pic/ |
| ipi.c | 59 struct cpu_info * const ci = curcpu(); local 60 int cpu_id = cpu_index(ci); 64 ci->ci_ev_ipi.ev_count++; 65 ipi = atomic_swap_32(&ci->ci_pending_ipis, 0); 80 ci->ci_onproc->l_md.md_astpending = 1;
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| ipi_openpic.c | 81 struct cpu_info * const ci = curcpu(); local 89 if (target == IPI_DST_ALL || dst_ci != ci) { 103 openpic_write(OPENPIC_IPI(cpu_index(ci), 1), cpumask);
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| /src/sys/kern/ |
| kern_idle.c | 47 struct cpu_info *ci = curcpu(); local 54 spc = &ci->ci_schedstate; 56 kcpuset_atomic_set(kcpuset_running, cpu_index(ci)); 74 KASSERT(ci == curcpu()); 89 !ci->ci_want_resched) { 104 create_idle_lwp(struct cpu_info *ci) 109 KASSERT(ci->ci_data.cpu_idlelwp == NULL); 111 ci, idle_loop, NULL, &l, "idle/%u", ci->ci_index); 116 if (ci != lwp0.l_cpu) [all...] |
| /src/sys/arch/amd64/include/ |
| cpu.h | 62 struct cpu_info *ci; local 65 "=r" (ci) : 68 return ci;
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| /src/sys/arch/i386/include/ |
| cpu.h | 59 struct cpu_info *ci; local 62 "=r" (ci) : 65 return ci;
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| /src/sys/arch/mips/alchemy/ |
| au_timer.c | 73 struct cpu_info * const ci = curcpu(); local 113 ci->ci_cpu_freq = ((ctrdiff[2] + ctrdiff[3]) / 2) * 16; 114 ci->ci_cctr_freq = ci->ci_cpu_freq; 117 ci->ci_cycles_per_hz = (ci->ci_cpu_freq + hz / 2) / hz; 120 ci->ci_divisor_delay = (ci->ci_cpu_freq + 500000) / 1000000; 127 ci->ci_cpu_freq *= 2; 131 ci->ci_cpu_freq, ctrdiff[2], ctrdiff[3]) [all...] |
| /src/sys/arch/x86/acpi/ |
| acpi_pdc.c | 55 struct cpu_info *ci = curcpu(); local 79 if ((ci->ci_feat_val[1] & CPUID2_MONITOR) != 0) 85 if ((ci->ci_feat_val[1] & CPUID2_EST) != 0) 88 if ((ci->ci_feat_val[0] & CPUID_ACPI) != 0) 115 struct cpu_info *ci; local 117 ci = acpi_match_cpu_handle(hdl); 119 if (ci != NULL)
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| /src/sys/arch/x86/x86/ |
| vmt.c | 48 struct cpu_info *ci = cfaa->ci; local 52 if ((ci->ci_flags & (CPUF_BSP|CPUF_SP|CPUF_PRIMARY)) == 0)
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