| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_cik.c | 1902 u32 clock_cntl, pc; local in function:cik_need_reset_on_init
1908 clock_cntl = RREG32_SMC(ixSMC_SYSCON_CLOCK_CNTL_0);
1910 if ((0 == REG_GET_FIELD(clock_cntl, SMC_SYSCON_CLOCK_CNTL_0, ck_disable)) &&
|
| amdgpu_vi.c | 1076 u32 clock_cntl, pc; local in function:vi_need_reset_on_init
1082 clock_cntl = RREG32_SMC(ixSMC_SYSCON_CLOCK_CNTL_0);
1084 if ((0 == REG_GET_FIELD(clock_cntl, SMC_SYSCON_CLOCK_CNTL_0, ck_disable)) &&
|
| /src/sys/dev/pci/ |
| machfb.c | 167 uint32_t clock_cntl; member in struct:mach64_crtcregs
355 reg = regr(sc, CLOCK_CNTL);
357 regw(sc, CLOCK_CNTL, reg);
362 regw(sc, CLOCK_CNTL, reg);
364 regw(sc, CLOCK_CNTL, reg);
371 regwb(sc, CLOCK_CNTL + 1, index << 2);
372 return regrb(sc, CLOCK_CNTL + 2);
572 reg = regr(sc, CLOCK_CNTL);
943 clk_ctl = regr(sc, CLOCK_CNTL);
1028 { 0x0090, "CLOCK_CNTL" },
[all...] |
