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    Searched defs:com0addr (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/arch/mips/ingenic/
ingenic_com.c 51 volatile int32_t *com0addr = (int32_t *)MIPS_PHYS_TO_KSEG1(JZ_UART0); variable in typeref:typename:volatile int32_t *
100 com0addr = (uint32_t *)MIPS_PHYS_TO_KSEG1(JZ_UART0);
107 com0addr[com_ier] = 0;
108 com0addr[com_lctl] = htole32(LCR_DLAB);
110 com0addr[com_dlbl] = htole32(rate & 0xff);
111 com0addr[com_dlbh] = htole32(rate >> 8);
113 com0addr[com_lctl] = htole32(LCR_8BITS); /* XXX */
114 com0addr[com_mcr] = htole32(MCR_DTR|MCR_RTS);
115 com0addr[com_fifo] = htole32(
129 while ((le32toh(com0addr[com_lsr]) & LSR_TXRDY) == 0
    [all...]
  /src/sys/arch/mips/rmi/
rmixl_com.c 142 volatile int32_t *com0addr = (int32_t *) variable in typeref:typename:volatile int32_t *
154 com0addr = (uint32_t *)
162 com0addr[com_ier] = 0;
163 com0addr[com_lctl] = htobe32(LCR_DLAB);
164 com0addr[com_dlbl] = htobe32(rate & 0xff);
165 com0addr[com_dlbh] = htobe32(rate >> 8);
166 com0addr[com_lctl] = htobe32(LCR_8BITS); /* XXX */
167 com0addr[com_mcr] = htobe32(MCR_DTR|MCR_RTS);
168 com0addr[com_fifo] = htobe32(
179 while ((be32toh(com0addr[com_lsr]) & LSR_TXRDY) == 0
    [all...]
  /src/sys/arch/evbarm/gemini/
gemini_machdep.c 501 unsigned char *com0addr = (unsigned char *)GEMINI_UART_VBASE; local in function:gemini_putchar
504 while ((com0addr[COM_REG_LSR * 4] & LSR_TXRDY) == 0)
508 com0addr[COM_REG_TXDATA] = c;
510 while ((com0addr[COM_REG_LSR * 4] & LSR_TSRE) == 0)
  /src/sys/arch/evbppc/mpc85xx/
machdep.c 448 volatile uint8_t * const com0addr = (void *)(GUR_BASE+CONSADDR); local in function:e500_cngetc
450 if ((com0addr[com_lsr] & LSR_RXRDY) == 0)
453 return com0addr[com_data] & 0xff;
459 volatile uint8_t * const com0addr = (void *)(GUR_BASE+CONSADDR); local in function:e500_cnputc
462 while ((com0addr[com_lsr] & LSR_TXRDY) == 0 && --timo > 0)
465 com0addr[com_data] = c;
468 while ((com0addr[com_lsr] & LSR_TSRE) == 0 && --timo > 0)

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