| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| armada-39x.dtsi | 93 clocks = <&coreclk 2>;
111 clocks = <&coreclk 0>;
121 clocks = <&coreclk 0>;
131 clocks = <&coreclk 0>;
141 clocks = <&coreclk 0>;
151 clocks = <&coreclk 0>;
161 clocks = <&coreclk 0>;
171 clocks = <&coreclk 0>;
181 clocks = <&coreclk 0>;
252 clocks = <&coreclk 0>
256 coreclk: mvebu-sar@18600 { label
[all...] |
| armada-xp-98dx3236.dtsi | 144 clocks = <&coreclk 0>;
152 clocks = <&coreclk 1>;
224 coreclk: mvebu-sar@f8204 { label in label:dfx
281 clocks = <&coreclk 2>, <&refclk>;
287 clocks = <&coreclk 2>, <&refclk>;
|
| armada-xp.dtsi | 61 clocks = <&coreclk 0>;
73 clocks = <&coreclk 0>;
85 clocks = <&coreclk 0>;
89 coreclk: mvebu-sar@18230 { label
106 clocks = <&coreclk 1>;
255 clocks = <&coreclk 2>, <&refclk>;
261 clocks = <&coreclk 2>, <&refclk>;
|
| armada-370.dtsi | 116 clocks = <&coreclk 0>;
131 clocks = <&coreclk 0>;
155 clocks = <&coreclk 0>;
159 coreclk: mvebu-sar@18230 { label
293 clocks = <&coreclk 2>;
298 clocks = <&coreclk 2>;
302 clocks = <&coreclk 0>;
306 clocks = <&coreclk 0>;
|
| armada-375.dtsi | 89 clocks = <&coreclk 0>;
99 clocks = <&coreclk 0>;
109 clocks = <&coreclk 0>;
119 clocks = <&coreclk 0>;
129 clocks = <&coreclk 0>;
159 clocks = <&coreclk 2>;
217 clocks = <&coreclk 0>;
229 clocks = <&coreclk 0>;
239 clocks = <&coreclk 0>;
249 clocks = <&coreclk 0>
531 coreclk: mvebu-sar@e8204 { label
[all...] |
| armada-38x.dtsi | 56 clocks = <&coreclk 0>;
66 clocks = <&coreclk 0>;
76 clocks = <&coreclk 0>;
86 clocks = <&coreclk 0>;
96 clocks = <&coreclk 0>;
131 clocks = <&coreclk 2>;
138 clocks = <&coreclk 2>;
156 clocks = <&coreclk 0>;
166 clocks = <&coreclk 0>;
176 clocks = <&coreclk 0>
381 coreclk: mvebu-sar@18600 { label
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/freescale/ |
| fsl-ls1012a.dtsi | 68 coreclk: coreclk { label
72 clock-output-names = "coreclk";
293 clocks = <&sysclk &coreclk>;
294 clock-names = "sysclk", "coreclk";
|
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_display.c | 8223 u32 coreclk, reg_val; local in function:vlv_prepare_pll
8304 coreclk = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW7(pipe));
8305 coreclk = (coreclk & 0x0000ff00) | 0x01c00000;
8307 coreclk |= 0x01000000;
8308 vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW7(pipe), coreclk);
|
