1 /* $NetBSD: intel_panel.c,v 1.5 2021/12/26 21:00:51 riastradh Exp $ */ 2 3 /* 4 * Copyright 2006-2010 Intel Corporation 5 * Copyright (c) 2006 Dave Airlie <airlied (at) linux.ie> 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the "Software"), 9 * to deal in the Software without restriction, including without limitation 10 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * and/or sell copies of the Software, and to permit persons to whom the 12 * Software is furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the next 15 * paragraph) shall be included in all copies or substantial portions of the 16 * Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 24 * DEALINGS IN THE SOFTWARE. 25 * 26 * Authors: 27 * Eric Anholt <eric (at) anholt.net> 28 * Dave Airlie <airlied (at) linux.ie> 29 * Jesse Barnes <jesse.barnes (at) intel.com> 30 * Chris Wilson <chris (at) chris-wilson.co.uk> 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: intel_panel.c,v 1.5 2021/12/26 21:00:51 riastradh Exp $"); 35 36 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 37 38 #include <linux/kernel.h> 39 #include <linux/moduleparam.h> 40 #include <linux/pwm.h> 41 42 #include "intel_connector.h" 43 #include "intel_display_types.h" 44 #include "intel_dp_aux_backlight.h" 45 #include "intel_dsi_dcs_backlight.h" 46 #include "intel_panel.h" 47 48 #define CRC_PMIC_PWM_PERIOD_NS 21333 49 50 void 51 intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, 52 struct drm_display_mode *adjusted_mode) 53 { 54 drm_mode_copy(adjusted_mode, fixed_mode); 55 56 drm_mode_set_crtcinfo(adjusted_mode, 0); 57 } 58 59 static bool is_downclock_mode(const struct drm_display_mode *downclock_mode, 60 const struct drm_display_mode *fixed_mode) 61 { 62 return drm_mode_match(downclock_mode, fixed_mode, 63 DRM_MODE_MATCH_TIMINGS | 64 DRM_MODE_MATCH_FLAGS | 65 DRM_MODE_MATCH_3D_FLAGS) && 66 downclock_mode->clock < fixed_mode->clock; 67 } 68 69 struct drm_display_mode * 70 intel_panel_edid_downclock_mode(struct intel_connector *connector, 71 const struct drm_display_mode *fixed_mode) 72 { 73 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 74 const struct drm_display_mode *scan, *best_mode = NULL; 75 struct drm_display_mode *downclock_mode; 76 int best_clock = fixed_mode->clock; 77 78 list_for_each_entry(scan, &connector->base.probed_modes, head) { 79 /* 80 * If one mode has the same resolution with the fixed_panel 81 * mode while they have the different refresh rate, it means 82 * that the reduced downclock is found. In such 83 * case we can set the different FPx0/1 to dynamically select 84 * between low and high frequency. 85 */ 86 if (is_downclock_mode(scan, fixed_mode) && 87 scan->clock < best_clock) { 88 /* 89 * The downclock is already found. But we 90 * expect to find the lower downclock. 91 */ 92 best_clock = scan->clock; 93 best_mode = scan; 94 } 95 } 96 97 if (!best_mode) 98 return NULL; 99 100 downclock_mode = drm_mode_duplicate(&dev_priv->drm, best_mode); 101 if (!downclock_mode) 102 return NULL; 103 104 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] using downclock mode from EDID: ", 105 connector->base.base.id, connector->base.name); 106 drm_mode_debug_printmodeline(downclock_mode); 107 108 return downclock_mode; 109 } 110 111 struct drm_display_mode * 112 intel_panel_edid_fixed_mode(struct intel_connector *connector) 113 { 114 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 115 const struct drm_display_mode *scan; 116 struct drm_display_mode *fixed_mode; 117 118 if (list_empty(&connector->base.probed_modes)) 119 return NULL; 120 121 /* prefer fixed mode from EDID if available */ 122 list_for_each_entry(scan, &connector->base.probed_modes, head) { 123 if ((scan->type & DRM_MODE_TYPE_PREFERRED) == 0) 124 continue; 125 126 fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan); 127 if (!fixed_mode) 128 return NULL; 129 130 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] using preferred mode from EDID: ", 131 connector->base.base.id, connector->base.name); 132 drm_mode_debug_printmodeline(fixed_mode); 133 134 return fixed_mode; 135 } 136 137 scan = list_first_entry(&connector->base.probed_modes, 138 typeof(*scan), head); 139 140 fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan); 141 if (!fixed_mode) 142 return NULL; 143 144 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 145 146 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] using first mode from EDID: ", 147 connector->base.base.id, connector->base.name); 148 drm_mode_debug_printmodeline(fixed_mode); 149 150 return fixed_mode; 151 } 152 153 struct drm_display_mode * 154 intel_panel_vbt_fixed_mode(struct intel_connector *connector) 155 { 156 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 157 struct drm_display_info *info = &connector->base.display_info; 158 struct drm_display_mode *fixed_mode; 159 160 if (!dev_priv->vbt.lfp_lvds_vbt_mode) 161 return NULL; 162 163 fixed_mode = drm_mode_duplicate(&dev_priv->drm, 164 dev_priv->vbt.lfp_lvds_vbt_mode); 165 if (!fixed_mode) 166 return NULL; 167 168 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 169 170 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] using mode from VBT: ", 171 connector->base.base.id, connector->base.name); 172 drm_mode_debug_printmodeline(fixed_mode); 173 174 info->width_mm = fixed_mode->width_mm; 175 info->height_mm = fixed_mode->height_mm; 176 177 return fixed_mode; 178 } 179 180 /* adjusted_mode has been preset to be the panel's fixed mode */ 181 void 182 intel_pch_panel_fitting(struct intel_crtc *intel_crtc, 183 struct intel_crtc_state *pipe_config, 184 int fitting_mode) 185 { 186 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 187 int x = 0, y = 0, width = 0, height = 0; 188 189 /* Native modes don't need fitting */ 190 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w && 191 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h && 192 pipe_config->output_format != INTEL_OUTPUT_FORMAT_YCBCR420) 193 goto done; 194 195 switch (fitting_mode) { 196 case DRM_MODE_SCALE_CENTER: 197 width = pipe_config->pipe_src_w; 198 height = pipe_config->pipe_src_h; 199 x = (adjusted_mode->crtc_hdisplay - width + 1)/2; 200 y = (adjusted_mode->crtc_vdisplay - height + 1)/2; 201 break; 202 203 case DRM_MODE_SCALE_ASPECT: 204 /* Scale but preserve the aspect ratio */ 205 { 206 u32 scaled_width = adjusted_mode->crtc_hdisplay 207 * pipe_config->pipe_src_h; 208 u32 scaled_height = pipe_config->pipe_src_w 209 * adjusted_mode->crtc_vdisplay; 210 if (scaled_width > scaled_height) { /* pillar */ 211 width = scaled_height / pipe_config->pipe_src_h; 212 if (width & 1) 213 width++; 214 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 215 y = 0; 216 height = adjusted_mode->crtc_vdisplay; 217 } else if (scaled_width < scaled_height) { /* letter */ 218 height = scaled_width / pipe_config->pipe_src_w; 219 if (height & 1) 220 height++; 221 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 222 x = 0; 223 width = adjusted_mode->crtc_hdisplay; 224 } else { 225 x = y = 0; 226 width = adjusted_mode->crtc_hdisplay; 227 height = adjusted_mode->crtc_vdisplay; 228 } 229 } 230 break; 231 232 case DRM_MODE_SCALE_FULLSCREEN: 233 x = y = 0; 234 width = adjusted_mode->crtc_hdisplay; 235 height = adjusted_mode->crtc_vdisplay; 236 break; 237 238 default: 239 WARN(1, "bad panel fit mode: %d\n", fitting_mode); 240 return; 241 } 242 243 done: 244 pipe_config->pch_pfit.pos = (x << 16) | y; 245 pipe_config->pch_pfit.size = (width << 16) | height; 246 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0; 247 } 248 249 static void 250 centre_horizontally(struct drm_display_mode *adjusted_mode, 251 int width) 252 { 253 u32 border, sync_pos, blank_width, sync_width; 254 255 /* keep the hsync and hblank widths constant */ 256 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; 257 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start; 258 sync_pos = (blank_width - sync_width + 1) / 2; 259 260 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 261 border += border & 1; /* make the border even */ 262 263 adjusted_mode->crtc_hdisplay = width; 264 adjusted_mode->crtc_hblank_start = width + border; 265 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width; 266 267 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos; 268 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width; 269 } 270 271 static void 272 centre_vertically(struct drm_display_mode *adjusted_mode, 273 int height) 274 { 275 u32 border, sync_pos, blank_width, sync_width; 276 277 /* keep the vsync and vblank widths constant */ 278 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start; 279 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start; 280 sync_pos = (blank_width - sync_width + 1) / 2; 281 282 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 283 284 adjusted_mode->crtc_vdisplay = height; 285 adjusted_mode->crtc_vblank_start = height + border; 286 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width; 287 288 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos; 289 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width; 290 } 291 292 static inline u32 panel_fitter_scaling(u32 source, u32 target) 293 { 294 /* 295 * Floating point operation is not supported. So the FACTOR 296 * is defined, which can avoid the floating point computation 297 * when calculating the panel ratio. 298 */ 299 #define ACCURACY 12 300 #define FACTOR (1 << ACCURACY) 301 u32 ratio = source * FACTOR / target; 302 return (FACTOR * ratio + FACTOR/2) / FACTOR; 303 } 304 305 static void i965_scale_aspect(struct intel_crtc_state *pipe_config, 306 u32 *pfit_control) 307 { 308 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 309 u32 scaled_width = adjusted_mode->crtc_hdisplay * 310 pipe_config->pipe_src_h; 311 u32 scaled_height = pipe_config->pipe_src_w * 312 adjusted_mode->crtc_vdisplay; 313 314 /* 965+ is easy, it does everything in hw */ 315 if (scaled_width > scaled_height) 316 *pfit_control |= PFIT_ENABLE | 317 PFIT_SCALING_PILLAR; 318 else if (scaled_width < scaled_height) 319 *pfit_control |= PFIT_ENABLE | 320 PFIT_SCALING_LETTER; 321 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w) 322 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; 323 } 324 325 static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config, 326 u32 *pfit_control, u32 *pfit_pgm_ratios, 327 u32 *border) 328 { 329 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 330 u32 scaled_width = adjusted_mode->crtc_hdisplay * 331 pipe_config->pipe_src_h; 332 u32 scaled_height = pipe_config->pipe_src_w * 333 adjusted_mode->crtc_vdisplay; 334 u32 bits; 335 336 /* 337 * For earlier chips we have to calculate the scaling 338 * ratio by hand and program it into the 339 * PFIT_PGM_RATIO register 340 */ 341 if (scaled_width > scaled_height) { /* pillar */ 342 centre_horizontally(adjusted_mode, 343 scaled_height / 344 pipe_config->pipe_src_h); 345 346 *border = LVDS_BORDER_ENABLE; 347 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) { 348 bits = panel_fitter_scaling(pipe_config->pipe_src_h, 349 adjusted_mode->crtc_vdisplay); 350 351 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 352 bits << PFIT_VERT_SCALE_SHIFT); 353 *pfit_control |= (PFIT_ENABLE | 354 VERT_INTERP_BILINEAR | 355 HORIZ_INTERP_BILINEAR); 356 } 357 } else if (scaled_width < scaled_height) { /* letter */ 358 centre_vertically(adjusted_mode, 359 scaled_width / 360 pipe_config->pipe_src_w); 361 362 *border = LVDS_BORDER_ENABLE; 363 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) { 364 bits = panel_fitter_scaling(pipe_config->pipe_src_w, 365 adjusted_mode->crtc_hdisplay); 366 367 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 368 bits << PFIT_VERT_SCALE_SHIFT); 369 *pfit_control |= (PFIT_ENABLE | 370 VERT_INTERP_BILINEAR | 371 HORIZ_INTERP_BILINEAR); 372 } 373 } else { 374 /* Aspects match, Let hw scale both directions */ 375 *pfit_control |= (PFIT_ENABLE | 376 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | 377 VERT_INTERP_BILINEAR | 378 HORIZ_INTERP_BILINEAR); 379 } 380 } 381 382 void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc, 383 struct intel_crtc_state *pipe_config, 384 int fitting_mode) 385 { 386 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); 387 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; 388 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 389 390 /* Native modes don't need fitting */ 391 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w && 392 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h) 393 goto out; 394 395 switch (fitting_mode) { 396 case DRM_MODE_SCALE_CENTER: 397 /* 398 * For centered modes, we have to calculate border widths & 399 * heights and modify the values programmed into the CRTC. 400 */ 401 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w); 402 centre_vertically(adjusted_mode, pipe_config->pipe_src_h); 403 border = LVDS_BORDER_ENABLE; 404 break; 405 case DRM_MODE_SCALE_ASPECT: 406 /* Scale but preserve the aspect ratio */ 407 if (INTEL_GEN(dev_priv) >= 4) 408 i965_scale_aspect(pipe_config, &pfit_control); 409 else 410 i9xx_scale_aspect(pipe_config, &pfit_control, 411 &pfit_pgm_ratios, &border); 412 break; 413 case DRM_MODE_SCALE_FULLSCREEN: 414 /* 415 * Full scaling, even if it changes the aspect ratio. 416 * Fortunately this is all done for us in hw. 417 */ 418 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay || 419 pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) { 420 pfit_control |= PFIT_ENABLE; 421 if (INTEL_GEN(dev_priv) >= 4) 422 pfit_control |= PFIT_SCALING_AUTO; 423 else 424 pfit_control |= (VERT_AUTO_SCALE | 425 VERT_INTERP_BILINEAR | 426 HORIZ_AUTO_SCALE | 427 HORIZ_INTERP_BILINEAR); 428 } 429 break; 430 default: 431 WARN(1, "bad panel fit mode: %d\n", fitting_mode); 432 return; 433 } 434 435 /* 965+ wants fuzzy fitting */ 436 /* FIXME: handle multiple panels by failing gracefully */ 437 if (INTEL_GEN(dev_priv) >= 4) 438 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | 439 PFIT_FILTER_FUZZY); 440 441 out: 442 if ((pfit_control & PFIT_ENABLE) == 0) { 443 pfit_control = 0; 444 pfit_pgm_ratios = 0; 445 } 446 447 /* Make sure pre-965 set dither correctly for 18bpp panels. */ 448 if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18) 449 pfit_control |= PANEL_8TO6_DITHER_ENABLE; 450 451 pipe_config->gmch_pfit.control = pfit_control; 452 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios; 453 pipe_config->gmch_pfit.lvds_border_bits = border; 454 } 455 456 /** 457 * scale - scale values from one range to another 458 * @source_val: value in range [@source_min..@source_max] 459 * @source_min: minimum legal value for @source_val 460 * @source_max: maximum legal value for @source_val 461 * @target_min: corresponding target value for @source_min 462 * @target_max: corresponding target value for @source_max 463 * 464 * Return @source_val in range [@source_min..@source_max] scaled to range 465 * [@target_min..@target_max]. 466 */ 467 static u32 scale(u32 source_val, 468 u32 source_min, u32 source_max, 469 u32 target_min, u32 target_max) 470 { 471 u64 target_val; 472 473 WARN_ON(source_min > source_max); 474 WARN_ON(target_min > target_max); 475 476 /* defensive */ 477 source_val = clamp(source_val, source_min, source_max); 478 479 /* avoid overflows */ 480 target_val = mul_u32_u32(source_val - source_min, 481 target_max - target_min); 482 target_val = DIV_ROUND_CLOSEST_ULL(target_val, source_max - source_min); 483 target_val += target_min; 484 485 return target_val; 486 } 487 488 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) 489 /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */ 490 static inline u32 scale_user_to_hw(struct intel_connector *connector, 491 u32 user_level, u32 user_max) 492 { 493 struct intel_panel *panel = &connector->panel; 494 495 return scale(user_level, 0, user_max, 496 panel->backlight.min, panel->backlight.max); 497 } 498 #endif 499 500 /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result 501 * to [hw_min..hw_max]. */ 502 static inline u32 clamp_user_to_hw(struct intel_connector *connector, 503 u32 user_level, u32 user_max) 504 { 505 struct intel_panel *panel = &connector->panel; 506 u32 hw_level; 507 508 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max); 509 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max); 510 511 return hw_level; 512 } 513 514 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) 515 /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */ 516 static inline u32 scale_hw_to_user(struct intel_connector *connector, 517 u32 hw_level, u32 user_max) 518 { 519 struct intel_panel *panel = &connector->panel; 520 521 return scale(hw_level, panel->backlight.min, panel->backlight.max, 522 0, user_max); 523 } 524 #endif 525 526 static u32 intel_panel_compute_brightness(struct intel_connector *connector, 527 u32 val) 528 { 529 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 530 struct intel_panel *panel = &connector->panel; 531 532 WARN_ON(panel->backlight.max == 0); 533 534 if (i915_modparams.invert_brightness < 0) 535 return val; 536 537 if (i915_modparams.invert_brightness > 0 || 538 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { 539 return panel->backlight.max - val + panel->backlight.min; 540 } 541 542 return val; 543 } 544 545 static u32 lpt_get_backlight(struct intel_connector *connector) 546 { 547 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 548 549 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; 550 } 551 552 static u32 pch_get_backlight(struct intel_connector *connector) 553 { 554 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 555 556 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 557 } 558 559 static u32 i9xx_get_backlight(struct intel_connector *connector) 560 { 561 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 562 struct intel_panel *panel = &connector->panel; 563 u32 val; 564 565 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 566 if (INTEL_GEN(dev_priv) < 4) 567 val >>= 1; 568 569 if (panel->backlight.combination_mode) { 570 u8 lbpc; 571 572 pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc); 573 val *= lbpc; 574 } 575 576 return val; 577 } 578 579 static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe) 580 { 581 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) 582 return 0; 583 584 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; 585 } 586 587 static u32 vlv_get_backlight(struct intel_connector *connector) 588 { 589 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 590 enum pipe pipe = intel_connector_get_pipe(connector); 591 592 return _vlv_get_backlight(dev_priv, pipe); 593 } 594 595 static u32 bxt_get_backlight(struct intel_connector *connector) 596 { 597 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 598 struct intel_panel *panel = &connector->panel; 599 600 return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller)); 601 } 602 603 #ifndef __NetBSD__ /* XXX mipi */ 604 static u32 pwm_get_backlight(struct intel_connector *connector) 605 { 606 struct intel_panel *panel = &connector->panel; 607 int duty_ns; 608 609 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm); 610 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS); 611 } 612 #endif 613 614 static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level) 615 { 616 struct intel_connector *connector = to_intel_connector(conn_state->connector); 617 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 618 619 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; 620 I915_WRITE(BLC_PWM_PCH_CTL2, val | level); 621 } 622 623 static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level) 624 { 625 struct intel_connector *connector = to_intel_connector(conn_state->connector); 626 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 627 u32 tmp; 628 629 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; 630 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level); 631 } 632 633 static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level) 634 { 635 struct intel_connector *connector = to_intel_connector(conn_state->connector); 636 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 637 struct intel_panel *panel = &connector->panel; 638 u32 tmp, mask; 639 640 WARN_ON(panel->backlight.max == 0); 641 642 if (panel->backlight.combination_mode) { 643 u8 lbpc; 644 645 lbpc = level * 0xfe / panel->backlight.max + 1; 646 level /= lbpc; 647 pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc); 648 } 649 650 if (IS_GEN(dev_priv, 4)) { 651 mask = BACKLIGHT_DUTY_CYCLE_MASK; 652 } else { 653 level <<= 1; 654 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; 655 } 656 657 tmp = I915_READ(BLC_PWM_CTL) & ~mask; 658 I915_WRITE(BLC_PWM_CTL, tmp | level); 659 } 660 661 static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level) 662 { 663 struct intel_connector *connector = to_intel_connector(conn_state->connector); 664 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 665 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; 666 u32 tmp; 667 668 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; 669 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level); 670 } 671 672 static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level) 673 { 674 struct intel_connector *connector = to_intel_connector(conn_state->connector); 675 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 676 struct intel_panel *panel = &connector->panel; 677 678 I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level); 679 } 680 681 #ifndef __NetBSD__ /* XXX mipi */ 682 static void pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level) 683 { 684 struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel; 685 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100); 686 687 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS); 688 } 689 #endif 690 691 static void 692 intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level) 693 { 694 struct intel_connector *connector = to_intel_connector(conn_state->connector); 695 struct intel_panel *panel = &connector->panel; 696 697 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level); 698 699 level = intel_panel_compute_brightness(connector, level); 700 panel->backlight.set(conn_state, level); 701 } 702 703 /* set backlight brightness to level in range [0..max], assuming hw min is 704 * respected. 705 */ 706 void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state, 707 u32 user_level, u32 user_max) 708 { 709 struct intel_connector *connector = to_intel_connector(conn_state->connector); 710 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 711 struct intel_panel *panel = &connector->panel; 712 u32 hw_level; 713 714 /* 715 * Lack of crtc may occur during driver init because 716 * connection_mutex isn't held across the entire backlight 717 * setup + modeset readout, and the BIOS can issue the 718 * requests at any time. 719 */ 720 if (!panel->backlight.present || !conn_state->crtc) 721 return; 722 723 mutex_lock(&dev_priv->backlight_lock); 724 725 WARN_ON(panel->backlight.max == 0); 726 727 hw_level = clamp_user_to_hw(connector, user_level, user_max); 728 panel->backlight.level = hw_level; 729 730 #ifndef __NetBSD__ /* XXX backlight */ 731 if (panel->backlight.device) 732 panel->backlight.device->props.brightness = 733 scale_hw_to_user(connector, 734 panel->backlight.level, 735 panel->backlight.device->props.max_brightness); 736 #endif 737 738 if (panel->backlight.enabled) 739 intel_panel_actually_set_backlight(conn_state, hw_level); 740 741 mutex_unlock(&dev_priv->backlight_lock); 742 } 743 744 static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state) 745 { 746 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 747 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 748 u32 tmp; 749 750 intel_panel_actually_set_backlight(old_conn_state, 0); 751 752 /* 753 * Although we don't support or enable CPU PWM with LPT/SPT based 754 * systems, it may have been enabled prior to loading the 755 * driver. Disable to avoid warnings on LCPLL disable. 756 * 757 * This needs rework if we need to add support for CPU PWM on PCH split 758 * platforms. 759 */ 760 tmp = I915_READ(BLC_PWM_CPU_CTL2); 761 if (tmp & BLM_PWM_ENABLE) { 762 DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n"); 763 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); 764 } 765 766 tmp = I915_READ(BLC_PWM_PCH_CTL1); 767 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 768 } 769 770 static void pch_disable_backlight(const struct drm_connector_state *old_conn_state) 771 { 772 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 773 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 774 u32 tmp; 775 776 intel_panel_actually_set_backlight(old_conn_state, 0); 777 778 tmp = I915_READ(BLC_PWM_CPU_CTL2); 779 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); 780 781 tmp = I915_READ(BLC_PWM_PCH_CTL1); 782 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 783 } 784 785 static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state) 786 { 787 intel_panel_actually_set_backlight(old_conn_state, 0); 788 } 789 790 static void i965_disable_backlight(const struct drm_connector_state *old_conn_state) 791 { 792 struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev); 793 u32 tmp; 794 795 intel_panel_actually_set_backlight(old_conn_state, 0); 796 797 tmp = I915_READ(BLC_PWM_CTL2); 798 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); 799 } 800 801 static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state) 802 { 803 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 804 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 805 enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe; 806 u32 tmp; 807 808 intel_panel_actually_set_backlight(old_conn_state, 0); 809 810 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe)); 811 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE); 812 } 813 814 static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state) 815 { 816 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 817 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 818 struct intel_panel *panel = &connector->panel; 819 u32 tmp, val; 820 821 intel_panel_actually_set_backlight(old_conn_state, 0); 822 823 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 824 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 825 tmp & ~BXT_BLC_PWM_ENABLE); 826 827 if (panel->backlight.controller == 1) { 828 val = I915_READ(UTIL_PIN_CTL); 829 val &= ~UTIL_PIN_ENABLE; 830 I915_WRITE(UTIL_PIN_CTL, val); 831 } 832 } 833 834 static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state) 835 { 836 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 837 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 838 struct intel_panel *panel = &connector->panel; 839 u32 tmp; 840 841 intel_panel_actually_set_backlight(old_conn_state, 0); 842 843 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 844 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 845 tmp & ~BXT_BLC_PWM_ENABLE); 846 } 847 848 #ifndef __NetBSD__ /* XXX mipi */ 849 static void pwm_disable_backlight(const struct drm_connector_state *old_conn_state) 850 { 851 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 852 struct intel_panel *panel = &connector->panel; 853 854 /* Disable the backlight */ 855 intel_panel_actually_set_backlight(old_conn_state, 0); 856 usleep_range(2000, 3000); 857 pwm_disable(panel->backlight.pwm); 858 } 859 #endif 860 861 void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state) 862 { 863 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 864 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 865 struct intel_panel *panel = &connector->panel; 866 867 if (!panel->backlight.present) 868 return; 869 870 /* 871 * Do not disable backlight on the vga_switcheroo path. When switching 872 * away from i915, the other client may depend on i915 to handle the 873 * backlight. This will leave the backlight on unnecessarily when 874 * another client is not activated. 875 */ 876 if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) { 877 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n"); 878 return; 879 } 880 881 mutex_lock(&dev_priv->backlight_lock); 882 883 #ifndef __NetBSD__ /* XXX backlight */ 884 if (panel->backlight.device) 885 panel->backlight.device->props.power = FB_BLANK_POWERDOWN; 886 #endif 887 panel->backlight.enabled = false; 888 panel->backlight.disable(old_conn_state); 889 890 mutex_unlock(&dev_priv->backlight_lock); 891 } 892 893 static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state, 894 const struct drm_connector_state *conn_state) 895 { 896 struct intel_connector *connector = to_intel_connector(conn_state->connector); 897 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 898 struct intel_panel *panel = &connector->panel; 899 u32 pch_ctl1, pch_ctl2, schicken; 900 901 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); 902 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 903 DRM_DEBUG_KMS("pch backlight already enabled\n"); 904 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 905 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); 906 } 907 908 if (HAS_PCH_LPT(dev_priv)) { 909 schicken = I915_READ(SOUTH_CHICKEN2); 910 if (panel->backlight.alternate_pwm_increment) 911 schicken |= LPT_PWM_GRANULARITY; 912 else 913 schicken &= ~LPT_PWM_GRANULARITY; 914 I915_WRITE(SOUTH_CHICKEN2, schicken); 915 } else { 916 schicken = I915_READ(SOUTH_CHICKEN1); 917 if (panel->backlight.alternate_pwm_increment) 918 schicken |= SPT_PWM_GRANULARITY; 919 else 920 schicken &= ~SPT_PWM_GRANULARITY; 921 I915_WRITE(SOUTH_CHICKEN1, schicken); 922 } 923 924 pch_ctl2 = panel->backlight.max << 16; 925 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); 926 927 pch_ctl1 = 0; 928 if (panel->backlight.active_low_pwm) 929 pch_ctl1 |= BLM_PCH_POLARITY; 930 931 /* After LPT, override is the default. */ 932 if (HAS_PCH_LPT(dev_priv)) 933 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE; 934 935 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); 936 POSTING_READ(BLC_PWM_PCH_CTL1); 937 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); 938 939 /* This won't stick until the above enable. */ 940 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 941 } 942 943 static void pch_enable_backlight(const struct intel_crtc_state *crtc_state, 944 const struct drm_connector_state *conn_state) 945 { 946 struct intel_connector *connector = to_intel_connector(conn_state->connector); 947 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 948 struct intel_panel *panel = &connector->panel; 949 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; 950 u32 cpu_ctl2, pch_ctl1, pch_ctl2; 951 952 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); 953 if (cpu_ctl2 & BLM_PWM_ENABLE) { 954 DRM_DEBUG_KMS("cpu backlight already enabled\n"); 955 cpu_ctl2 &= ~BLM_PWM_ENABLE; 956 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); 957 } 958 959 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); 960 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 961 DRM_DEBUG_KMS("pch backlight already enabled\n"); 962 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 963 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); 964 } 965 966 if (cpu_transcoder == TRANSCODER_EDP) 967 cpu_ctl2 = BLM_TRANSCODER_EDP; 968 else 969 cpu_ctl2 = BLM_PIPE(cpu_transcoder); 970 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); 971 POSTING_READ(BLC_PWM_CPU_CTL2); 972 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE); 973 974 /* This won't stick until the above enable. */ 975 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 976 977 pch_ctl2 = panel->backlight.max << 16; 978 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); 979 980 pch_ctl1 = 0; 981 if (panel->backlight.active_low_pwm) 982 pch_ctl1 |= BLM_PCH_POLARITY; 983 984 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); 985 POSTING_READ(BLC_PWM_PCH_CTL1); 986 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); 987 } 988 989 static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state, 990 const struct drm_connector_state *conn_state) 991 { 992 struct intel_connector *connector = to_intel_connector(conn_state->connector); 993 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 994 struct intel_panel *panel = &connector->panel; 995 u32 ctl, freq; 996 997 ctl = I915_READ(BLC_PWM_CTL); 998 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { 999 DRM_DEBUG_KMS("backlight already enabled\n"); 1000 I915_WRITE(BLC_PWM_CTL, 0); 1001 } 1002 1003 freq = panel->backlight.max; 1004 if (panel->backlight.combination_mode) 1005 freq /= 0xff; 1006 1007 ctl = freq << 17; 1008 if (panel->backlight.combination_mode) 1009 ctl |= BLM_LEGACY_MODE; 1010 if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm) 1011 ctl |= BLM_POLARITY_PNV; 1012 1013 I915_WRITE(BLC_PWM_CTL, ctl); 1014 POSTING_READ(BLC_PWM_CTL); 1015 1016 /* XXX: combine this into above write? */ 1017 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1018 1019 /* 1020 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is 1021 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2 1022 * that has backlight. 1023 */ 1024 if (IS_GEN(dev_priv, 2)) 1025 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE); 1026 } 1027 1028 static void i965_enable_backlight(const struct intel_crtc_state *crtc_state, 1029 const struct drm_connector_state *conn_state) 1030 { 1031 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1032 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1033 struct intel_panel *panel = &connector->panel; 1034 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; 1035 u32 ctl, ctl2, freq; 1036 1037 ctl2 = I915_READ(BLC_PWM_CTL2); 1038 if (ctl2 & BLM_PWM_ENABLE) { 1039 DRM_DEBUG_KMS("backlight already enabled\n"); 1040 ctl2 &= ~BLM_PWM_ENABLE; 1041 I915_WRITE(BLC_PWM_CTL2, ctl2); 1042 } 1043 1044 freq = panel->backlight.max; 1045 if (panel->backlight.combination_mode) 1046 freq /= 0xff; 1047 1048 ctl = freq << 16; 1049 I915_WRITE(BLC_PWM_CTL, ctl); 1050 1051 ctl2 = BLM_PIPE(pipe); 1052 if (panel->backlight.combination_mode) 1053 ctl2 |= BLM_COMBINATION_MODE; 1054 if (panel->backlight.active_low_pwm) 1055 ctl2 |= BLM_POLARITY_I965; 1056 I915_WRITE(BLC_PWM_CTL2, ctl2); 1057 POSTING_READ(BLC_PWM_CTL2); 1058 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); 1059 1060 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1061 } 1062 1063 static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state, 1064 const struct drm_connector_state *conn_state) 1065 { 1066 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1067 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1068 struct intel_panel *panel = &connector->panel; 1069 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1070 u32 ctl, ctl2; 1071 1072 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); 1073 if (ctl2 & BLM_PWM_ENABLE) { 1074 DRM_DEBUG_KMS("backlight already enabled\n"); 1075 ctl2 &= ~BLM_PWM_ENABLE; 1076 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); 1077 } 1078 1079 ctl = panel->backlight.max << 16; 1080 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl); 1081 1082 /* XXX: combine this into above write? */ 1083 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1084 1085 ctl2 = 0; 1086 if (panel->backlight.active_low_pwm) 1087 ctl2 |= BLM_POLARITY_I965; 1088 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); 1089 POSTING_READ(VLV_BLC_PWM_CTL2(pipe)); 1090 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE); 1091 } 1092 1093 static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state, 1094 const struct drm_connector_state *conn_state) 1095 { 1096 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1097 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1098 struct intel_panel *panel = &connector->panel; 1099 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1100 u32 pwm_ctl, val; 1101 1102 /* Controller 1 uses the utility pin. */ 1103 if (panel->backlight.controller == 1) { 1104 val = I915_READ(UTIL_PIN_CTL); 1105 if (val & UTIL_PIN_ENABLE) { 1106 DRM_DEBUG_KMS("util pin already enabled\n"); 1107 val &= ~UTIL_PIN_ENABLE; 1108 I915_WRITE(UTIL_PIN_CTL, val); 1109 } 1110 1111 val = 0; 1112 if (panel->backlight.util_pin_active_low) 1113 val |= UTIL_PIN_POLARITY; 1114 I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) | 1115 UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE); 1116 } 1117 1118 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1119 if (pwm_ctl & BXT_BLC_PWM_ENABLE) { 1120 DRM_DEBUG_KMS("backlight already enabled\n"); 1121 pwm_ctl &= ~BXT_BLC_PWM_ENABLE; 1122 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 1123 pwm_ctl); 1124 } 1125 1126 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller), 1127 panel->backlight.max); 1128 1129 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1130 1131 pwm_ctl = 0; 1132 if (panel->backlight.active_low_pwm) 1133 pwm_ctl |= BXT_BLC_PWM_POLARITY; 1134 1135 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl); 1136 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1137 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 1138 pwm_ctl | BXT_BLC_PWM_ENABLE); 1139 } 1140 1141 static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state, 1142 const struct drm_connector_state *conn_state) 1143 { 1144 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1145 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1146 struct intel_panel *panel = &connector->panel; 1147 u32 pwm_ctl; 1148 1149 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1150 if (pwm_ctl & BXT_BLC_PWM_ENABLE) { 1151 DRM_DEBUG_KMS("backlight already enabled\n"); 1152 pwm_ctl &= ~BXT_BLC_PWM_ENABLE; 1153 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 1154 pwm_ctl); 1155 } 1156 1157 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller), 1158 panel->backlight.max); 1159 1160 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1161 1162 pwm_ctl = 0; 1163 if (panel->backlight.active_low_pwm) 1164 pwm_ctl |= BXT_BLC_PWM_POLARITY; 1165 1166 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl); 1167 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1168 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), 1169 pwm_ctl | BXT_BLC_PWM_ENABLE); 1170 } 1171 1172 #ifndef __NetBSD__ /* XXX mipi */ 1173 static void pwm_enable_backlight(const struct intel_crtc_state *crtc_state, 1174 const struct drm_connector_state *conn_state) 1175 { 1176 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1177 struct intel_panel *panel = &connector->panel; 1178 1179 pwm_enable(panel->backlight.pwm); 1180 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1181 } 1182 #endif 1183 1184 static void __intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, 1185 const struct drm_connector_state *conn_state) 1186 { 1187 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1188 struct intel_panel *panel = &connector->panel; 1189 1190 WARN_ON(panel->backlight.max == 0); 1191 1192 if (panel->backlight.level <= panel->backlight.min) { 1193 panel->backlight.level = panel->backlight.max; 1194 #ifndef __NetBSD__ /* XXX backlight */ 1195 if (panel->backlight.device) 1196 panel->backlight.device->props.brightness = 1197 scale_hw_to_user(connector, 1198 panel->backlight.level, 1199 panel->backlight.device->props.max_brightness); 1200 #endif 1201 } 1202 1203 panel->backlight.enable(crtc_state, conn_state); 1204 panel->backlight.enabled = true; 1205 #ifndef __NetBSD__ /* XXX backlight */ 1206 if (panel->backlight.device) 1207 panel->backlight.device->props.power = FB_BLANK_UNBLANK; 1208 #endif 1209 } 1210 1211 void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, 1212 const struct drm_connector_state *conn_state) 1213 { 1214 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1215 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1216 struct intel_panel *panel = &connector->panel; 1217 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1218 1219 if (!panel->backlight.present) 1220 return; 1221 1222 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe)); 1223 1224 mutex_lock(&dev_priv->backlight_lock); 1225 1226 __intel_panel_enable_backlight(crtc_state, conn_state); 1227 1228 mutex_unlock(&dev_priv->backlight_lock); 1229 } 1230 1231 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) 1232 static u32 intel_panel_get_backlight(struct intel_connector *connector) 1233 { 1234 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1235 struct intel_panel *panel = &connector->panel; 1236 u32 val = 0; 1237 1238 mutex_lock(&dev_priv->backlight_lock); 1239 1240 if (panel->backlight.enabled) { 1241 val = panel->backlight.get(connector); 1242 val = intel_panel_compute_brightness(connector, val); 1243 } 1244 1245 mutex_unlock(&dev_priv->backlight_lock); 1246 1247 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); 1248 return val; 1249 } 1250 1251 /* set backlight brightness to level in range [0..max], scaling wrt hw min */ 1252 static void intel_panel_set_backlight(const struct drm_connector_state *conn_state, 1253 u32 user_level, u32 user_max) 1254 { 1255 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1256 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1257 struct intel_panel *panel = &connector->panel; 1258 u32 hw_level; 1259 1260 if (!panel->backlight.present) 1261 return; 1262 1263 mutex_lock(&dev_priv->backlight_lock); 1264 1265 WARN_ON(panel->backlight.max == 0); 1266 1267 hw_level = scale_user_to_hw(connector, user_level, user_max); 1268 panel->backlight.level = hw_level; 1269 1270 if (panel->backlight.enabled) 1271 intel_panel_actually_set_backlight(conn_state, hw_level); 1272 1273 mutex_unlock(&dev_priv->backlight_lock); 1274 } 1275 1276 static int intel_backlight_device_update_status(struct backlight_device *bd) 1277 { 1278 struct intel_connector *connector = bl_get_data(bd); 1279 struct intel_panel *panel = &connector->panel; 1280 struct drm_device *dev = connector->base.dev; 1281 1282 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1283 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n", 1284 bd->props.brightness, bd->props.max_brightness); 1285 intel_panel_set_backlight(connector->base.state, bd->props.brightness, 1286 bd->props.max_brightness); 1287 1288 /* 1289 * Allow flipping bl_power as a sub-state of enabled. Sadly the 1290 * backlight class device does not make it easy to to differentiate 1291 * between callbacks for brightness and bl_power, so our backlight_power 1292 * callback needs to take this into account. 1293 */ 1294 if (panel->backlight.enabled) { 1295 if (panel->backlight.power) { 1296 bool enable = bd->props.power == FB_BLANK_UNBLANK && 1297 bd->props.brightness != 0; 1298 panel->backlight.power(connector, enable); 1299 } 1300 } else { 1301 bd->props.power = FB_BLANK_POWERDOWN; 1302 } 1303 1304 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1305 return 0; 1306 } 1307 1308 static int intel_backlight_device_get_brightness(struct backlight_device *bd) 1309 { 1310 struct intel_connector *connector = bl_get_data(bd); 1311 struct drm_device *dev = connector->base.dev; 1312 struct drm_i915_private *dev_priv = to_i915(dev); 1313 intel_wakeref_t wakeref; 1314 int ret = 0; 1315 1316 with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) { 1317 u32 hw_level; 1318 1319 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1320 1321 hw_level = intel_panel_get_backlight(connector); 1322 ret = scale_hw_to_user(connector, 1323 hw_level, bd->props.max_brightness); 1324 1325 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1326 } 1327 1328 return ret; 1329 } 1330 1331 static const struct backlight_ops intel_backlight_device_ops = { 1332 .update_status = intel_backlight_device_update_status, 1333 .get_brightness = intel_backlight_device_get_brightness, 1334 }; 1335 1336 int intel_backlight_device_register(struct intel_connector *connector) 1337 { 1338 struct intel_panel *panel = &connector->panel; 1339 struct backlight_properties props; 1340 1341 if (WARN_ON(panel->backlight.device)) 1342 return -ENODEV; 1343 1344 if (!panel->backlight.present) 1345 return 0; 1346 1347 WARN_ON(panel->backlight.max == 0); 1348 1349 memset(&props, 0, sizeof(props)); 1350 props.type = BACKLIGHT_RAW; 1351 1352 /* 1353 * Note: Everything should work even if the backlight device max 1354 * presented to the userspace is arbitrarily chosen. 1355 */ 1356 props.max_brightness = panel->backlight.max; 1357 props.brightness = scale_hw_to_user(connector, 1358 panel->backlight.level, 1359 props.max_brightness); 1360 1361 if (panel->backlight.enabled) 1362 props.power = FB_BLANK_UNBLANK; 1363 else 1364 props.power = FB_BLANK_POWERDOWN; 1365 1366 /* 1367 * Note: using the same name independent of the connector prevents 1368 * registration of multiple backlight devices in the driver. 1369 */ 1370 panel->backlight.device = 1371 backlight_device_register("intel_backlight", 1372 connector->base.kdev, 1373 connector, 1374 &intel_backlight_device_ops, &props); 1375 1376 if (IS_ERR(panel->backlight.device)) { 1377 DRM_ERROR("Failed to register backlight: %ld\n", 1378 PTR_ERR(panel->backlight.device)); 1379 panel->backlight.device = NULL; 1380 return -ENODEV; 1381 } 1382 1383 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n", 1384 connector->base.name); 1385 1386 return 0; 1387 } 1388 1389 void intel_backlight_device_unregister(struct intel_connector *connector) 1390 { 1391 struct intel_panel *panel = &connector->panel; 1392 1393 if (panel->backlight.device) { 1394 backlight_device_unregister(panel->backlight.device); 1395 panel->backlight.device = NULL; 1396 } 1397 } 1398 #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ 1399 1400 /* 1401 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz. 1402 * PWM increment = 1 1403 */ 1404 static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1405 { 1406 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1407 1408 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz); 1409 } 1410 1411 /* 1412 * BXT: PWM clock frequency = 19.2 MHz. 1413 */ 1414 static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1415 { 1416 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz); 1417 } 1418 1419 /* 1420 * SPT: This value represents the period of the PWM stream in clock periods 1421 * multiplied by 16 (default increment) or 128 (alternate increment selected in 1422 * SCHICKEN_1 bit 0). PWM clock is 24 MHz. 1423 */ 1424 static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1425 { 1426 struct intel_panel *panel = &connector->panel; 1427 u32 mul; 1428 1429 if (panel->backlight.alternate_pwm_increment) 1430 mul = 128; 1431 else 1432 mul = 16; 1433 1434 return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul); 1435 } 1436 1437 /* 1438 * LPT: This value represents the period of the PWM stream in clock periods 1439 * multiplied by 128 (default increment) or 16 (alternate increment, selected in 1440 * LPT SOUTH_CHICKEN2 register bit 5). 1441 */ 1442 static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1443 { 1444 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1445 struct intel_panel *panel = &connector->panel; 1446 u32 mul, clock; 1447 1448 if (panel->backlight.alternate_pwm_increment) 1449 mul = 16; 1450 else 1451 mul = 128; 1452 1453 if (HAS_PCH_LPT_H(dev_priv)) 1454 clock = MHz(135); /* LPT:H */ 1455 else 1456 clock = MHz(24); /* LPT:LP */ 1457 1458 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); 1459 } 1460 1461 /* 1462 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH 1463 * display raw clocks multiplied by 128. 1464 */ 1465 static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1466 { 1467 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1468 1469 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128); 1470 } 1471 1472 /* 1473 * Gen2: This field determines the number of time base events (display core 1474 * clock frequency/32) in total for a complete cycle of modulated backlight 1475 * control. 1476 * 1477 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock) 1478 * divided by 32. 1479 */ 1480 static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1481 { 1482 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1483 int clock; 1484 1485 if (IS_PINEVIEW(dev_priv)) 1486 clock = KHz(dev_priv->rawclk_freq); 1487 else 1488 clock = KHz(dev_priv->cdclk.hw.cdclk); 1489 1490 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32); 1491 } 1492 1493 /* 1494 * Gen4: This value represents the period of the PWM stream in display core 1495 * clocks ([DevCTG] HRAW clocks) multiplied by 128. 1496 * 1497 */ 1498 static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1499 { 1500 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1501 int clock; 1502 1503 if (IS_G4X(dev_priv)) 1504 clock = KHz(dev_priv->rawclk_freq); 1505 else 1506 clock = KHz(dev_priv->cdclk.hw.cdclk); 1507 1508 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128); 1509 } 1510 1511 /* 1512 * VLV: This value represents the period of the PWM stream in display core 1513 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks 1514 * multiplied by 16. CHV uses a 19.2MHz S0IX clock. 1515 */ 1516 static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1517 { 1518 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1519 int mul, clock; 1520 1521 if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) { 1522 if (IS_CHERRYVIEW(dev_priv)) 1523 clock = KHz(19200); 1524 else 1525 clock = MHz(25); 1526 mul = 16; 1527 } else { 1528 clock = KHz(dev_priv->rawclk_freq); 1529 mul = 128; 1530 } 1531 1532 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); 1533 } 1534 1535 static u32 get_backlight_max_vbt(struct intel_connector *connector) 1536 { 1537 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1538 struct intel_panel *panel = &connector->panel; 1539 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz; 1540 u32 pwm; 1541 1542 if (!panel->backlight.hz_to_pwm) { 1543 DRM_DEBUG_KMS("backlight frequency conversion not supported\n"); 1544 return 0; 1545 } 1546 1547 if (pwm_freq_hz) { 1548 DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n", 1549 pwm_freq_hz); 1550 } else { 1551 pwm_freq_hz = 200; 1552 DRM_DEBUG_KMS("default backlight frequency %u Hz\n", 1553 pwm_freq_hz); 1554 } 1555 1556 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz); 1557 if (!pwm) { 1558 DRM_DEBUG_KMS("backlight frequency conversion failed\n"); 1559 return 0; 1560 } 1561 1562 return pwm; 1563 } 1564 1565 /* 1566 * Note: The setup hooks can't assume pipe is set! 1567 */ 1568 static u32 get_backlight_min_vbt(struct intel_connector *connector) 1569 { 1570 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1571 struct intel_panel *panel = &connector->panel; 1572 int min; 1573 1574 WARN_ON(panel->backlight.max == 0); 1575 1576 /* 1577 * XXX: If the vbt value is 255, it makes min equal to max, which leads 1578 * to problems. There are such machines out there. Either our 1579 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard 1580 * against this by letting the minimum be at most (arbitrarily chosen) 1581 * 25% of the max. 1582 */ 1583 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64); 1584 if (min != dev_priv->vbt.backlight.min_brightness) { 1585 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n", 1586 dev_priv->vbt.backlight.min_brightness, min); 1587 } 1588 1589 /* vbt value is a coefficient in range [0..255] */ 1590 return scale(min, 0, 255, 0, panel->backlight.max); 1591 } 1592 1593 static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused) 1594 { 1595 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1596 struct intel_panel *panel = &connector->panel; 1597 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; 1598 bool alt, cpu_mode; 1599 1600 if (HAS_PCH_LPT(dev_priv)) 1601 alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY; 1602 else 1603 alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY; 1604 panel->backlight.alternate_pwm_increment = alt; 1605 1606 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); 1607 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1608 1609 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); 1610 panel->backlight.max = pch_ctl2 >> 16; 1611 1612 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); 1613 1614 if (!panel->backlight.max) 1615 panel->backlight.max = get_backlight_max_vbt(connector); 1616 1617 if (!panel->backlight.max) 1618 return -ENODEV; 1619 1620 panel->backlight.min = get_backlight_min_vbt(connector); 1621 1622 panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE; 1623 1624 cpu_mode = panel->backlight.enabled && HAS_PCH_LPT(dev_priv) && 1625 !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) && 1626 (cpu_ctl2 & BLM_PWM_ENABLE); 1627 if (cpu_mode) 1628 val = pch_get_backlight(connector); 1629 else 1630 val = lpt_get_backlight(connector); 1631 val = intel_panel_compute_brightness(connector, val); 1632 panel->backlight.level = clamp(val, panel->backlight.min, 1633 panel->backlight.max); 1634 1635 if (cpu_mode) { 1636 DRM_DEBUG_KMS("CPU backlight register was enabled, switching to PCH override\n"); 1637 1638 /* Write converted CPU PWM value to PCH override register */ 1639 lpt_set_backlight(connector->base.state, panel->backlight.level); 1640 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_OVERRIDE_ENABLE); 1641 1642 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 & ~BLM_PWM_ENABLE); 1643 } 1644 1645 return 0; 1646 } 1647 1648 static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused) 1649 { 1650 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1651 struct intel_panel *panel = &connector->panel; 1652 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; 1653 1654 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); 1655 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1656 1657 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); 1658 panel->backlight.max = pch_ctl2 >> 16; 1659 1660 if (!panel->backlight.max) 1661 panel->backlight.max = get_backlight_max_vbt(connector); 1662 1663 if (!panel->backlight.max) 1664 return -ENODEV; 1665 1666 panel->backlight.min = get_backlight_min_vbt(connector); 1667 1668 val = pch_get_backlight(connector); 1669 val = intel_panel_compute_brightness(connector, val); 1670 panel->backlight.level = clamp(val, panel->backlight.min, 1671 panel->backlight.max); 1672 1673 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); 1674 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) && 1675 (pch_ctl1 & BLM_PCH_PWM_ENABLE); 1676 1677 return 0; 1678 } 1679 1680 static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused) 1681 { 1682 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1683 struct intel_panel *panel = &connector->panel; 1684 u32 ctl, val; 1685 1686 ctl = I915_READ(BLC_PWM_CTL); 1687 1688 if (IS_GEN(dev_priv, 2) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv)) 1689 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; 1690 1691 if (IS_PINEVIEW(dev_priv)) 1692 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; 1693 1694 panel->backlight.max = ctl >> 17; 1695 1696 if (!panel->backlight.max) { 1697 panel->backlight.max = get_backlight_max_vbt(connector); 1698 panel->backlight.max >>= 1; 1699 } 1700 1701 if (!panel->backlight.max) 1702 return -ENODEV; 1703 1704 if (panel->backlight.combination_mode) 1705 panel->backlight.max *= 0xff; 1706 1707 panel->backlight.min = get_backlight_min_vbt(connector); 1708 1709 val = i9xx_get_backlight(connector); 1710 val = intel_panel_compute_brightness(connector, val); 1711 panel->backlight.level = clamp(val, panel->backlight.min, 1712 panel->backlight.max); 1713 1714 panel->backlight.enabled = val != 0; 1715 1716 return 0; 1717 } 1718 1719 static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused) 1720 { 1721 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1722 struct intel_panel *panel = &connector->panel; 1723 u32 ctl, ctl2, val; 1724 1725 ctl2 = I915_READ(BLC_PWM_CTL2); 1726 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE; 1727 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1728 1729 ctl = I915_READ(BLC_PWM_CTL); 1730 panel->backlight.max = ctl >> 16; 1731 1732 if (!panel->backlight.max) 1733 panel->backlight.max = get_backlight_max_vbt(connector); 1734 1735 if (!panel->backlight.max) 1736 return -ENODEV; 1737 1738 if (panel->backlight.combination_mode) 1739 panel->backlight.max *= 0xff; 1740 1741 panel->backlight.min = get_backlight_min_vbt(connector); 1742 1743 val = i9xx_get_backlight(connector); 1744 val = intel_panel_compute_brightness(connector, val); 1745 panel->backlight.level = clamp(val, panel->backlight.min, 1746 panel->backlight.max); 1747 1748 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE; 1749 1750 return 0; 1751 } 1752 1753 static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe) 1754 { 1755 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1756 struct intel_panel *panel = &connector->panel; 1757 u32 ctl, ctl2, val; 1758 1759 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B)) 1760 return -ENODEV; 1761 1762 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); 1763 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1764 1765 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe)); 1766 panel->backlight.max = ctl >> 16; 1767 1768 if (!panel->backlight.max) 1769 panel->backlight.max = get_backlight_max_vbt(connector); 1770 1771 if (!panel->backlight.max) 1772 return -ENODEV; 1773 1774 panel->backlight.min = get_backlight_min_vbt(connector); 1775 1776 val = _vlv_get_backlight(dev_priv, pipe); 1777 val = intel_panel_compute_brightness(connector, val); 1778 panel->backlight.level = clamp(val, panel->backlight.min, 1779 panel->backlight.max); 1780 1781 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE; 1782 1783 return 0; 1784 } 1785 1786 static int 1787 bxt_setup_backlight(struct intel_connector *connector, enum pipe unused) 1788 { 1789 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1790 struct intel_panel *panel = &connector->panel; 1791 u32 pwm_ctl, val; 1792 1793 panel->backlight.controller = dev_priv->vbt.backlight.controller; 1794 1795 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1796 1797 /* Controller 1 uses the utility pin. */ 1798 if (panel->backlight.controller == 1) { 1799 val = I915_READ(UTIL_PIN_CTL); 1800 panel->backlight.util_pin_active_low = 1801 val & UTIL_PIN_POLARITY; 1802 } 1803 1804 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; 1805 panel->backlight.max = 1806 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller)); 1807 1808 if (!panel->backlight.max) 1809 panel->backlight.max = get_backlight_max_vbt(connector); 1810 1811 if (!panel->backlight.max) 1812 return -ENODEV; 1813 1814 panel->backlight.min = get_backlight_min_vbt(connector); 1815 1816 val = bxt_get_backlight(connector); 1817 val = intel_panel_compute_brightness(connector, val); 1818 panel->backlight.level = clamp(val, panel->backlight.min, 1819 panel->backlight.max); 1820 1821 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; 1822 1823 return 0; 1824 } 1825 1826 static int 1827 cnp_setup_backlight(struct intel_connector *connector, enum pipe unused) 1828 { 1829 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1830 struct intel_panel *panel = &connector->panel; 1831 u32 pwm_ctl, val; 1832 1833 /* 1834 * CNP has the BXT implementation of backlight, but with only one 1835 * controller. TODO: ICP has multiple controllers but we only use 1836 * controller 0 for now. 1837 */ 1838 panel->backlight.controller = 0; 1839 1840 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller)); 1841 1842 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; 1843 panel->backlight.max = 1844 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller)); 1845 1846 if (!panel->backlight.max) 1847 panel->backlight.max = get_backlight_max_vbt(connector); 1848 1849 if (!panel->backlight.max) 1850 return -ENODEV; 1851 1852 panel->backlight.min = get_backlight_min_vbt(connector); 1853 1854 val = bxt_get_backlight(connector); 1855 val = intel_panel_compute_brightness(connector, val); 1856 panel->backlight.level = clamp(val, panel->backlight.min, 1857 panel->backlight.max); 1858 1859 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; 1860 1861 return 0; 1862 } 1863 1864 #ifndef __NetBSD__ /* XXX mipi */ 1865 static int pwm_setup_backlight(struct intel_connector *connector, 1866 enum pipe pipe) 1867 { 1868 struct drm_device *dev = connector->base.dev; 1869 struct drm_i915_private *dev_priv = to_i915(dev); 1870 struct intel_panel *panel = &connector->panel; 1871 const char *desc; 1872 int retval; 1873 1874 /* Get the right PWM chip for DSI backlight according to VBT */ 1875 if (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) { 1876 panel->backlight.pwm = pwm_get(dev->dev, "pwm_pmic_backlight"); 1877 desc = "PMIC"; 1878 } else { 1879 panel->backlight.pwm = pwm_get(dev->dev, "pwm_soc_backlight"); 1880 desc = "SoC"; 1881 } 1882 1883 if (IS_ERR(panel->backlight.pwm)) { 1884 DRM_ERROR("Failed to get the %s PWM chip\n", desc); 1885 panel->backlight.pwm = NULL; 1886 return -ENODEV; 1887 } 1888 1889 /* 1890 * FIXME: pwm_apply_args() should be removed when switching to 1891 * the atomic PWM API. 1892 */ 1893 pwm_apply_args(panel->backlight.pwm); 1894 1895 retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS, 1896 CRC_PMIC_PWM_PERIOD_NS); 1897 if (retval < 0) { 1898 DRM_ERROR("Failed to configure the pwm chip\n"); 1899 pwm_put(panel->backlight.pwm); 1900 panel->backlight.pwm = NULL; 1901 return retval; 1902 } 1903 1904 panel->backlight.min = 0; /* 0% */ 1905 panel->backlight.max = 100; /* 100% */ 1906 panel->backlight.level = DIV_ROUND_UP( 1907 pwm_get_duty_cycle(panel->backlight.pwm) * 100, 1908 CRC_PMIC_PWM_PERIOD_NS); 1909 panel->backlight.enabled = panel->backlight.level != 0; 1910 1911 DRM_INFO("Using %s PWM for LCD backlight control\n", desc); 1912 return 0; 1913 } 1914 #endif 1915 1916 void intel_panel_update_backlight(struct intel_encoder *encoder, 1917 const struct intel_crtc_state *crtc_state, 1918 const struct drm_connector_state *conn_state) 1919 { 1920 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1921 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1922 struct intel_panel *panel = &connector->panel; 1923 1924 if (!panel->backlight.present) 1925 return; 1926 1927 mutex_lock(&dev_priv->backlight_lock); 1928 if (!panel->backlight.enabled) 1929 __intel_panel_enable_backlight(crtc_state, conn_state); 1930 1931 mutex_unlock(&dev_priv->backlight_lock); 1932 } 1933 1934 int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe) 1935 { 1936 struct drm_i915_private *dev_priv = to_i915(connector->dev); 1937 struct intel_connector *intel_connector = to_intel_connector(connector); 1938 struct intel_panel *panel = &intel_connector->panel; 1939 int ret; 1940 1941 if (!dev_priv->vbt.backlight.present) { 1942 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) { 1943 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n"); 1944 } else { 1945 DRM_DEBUG_KMS("no backlight present per VBT\n"); 1946 return 0; 1947 } 1948 } 1949 1950 /* ensure intel_panel has been initialized first */ 1951 if (WARN_ON(!panel->backlight.setup)) 1952 return -ENODEV; 1953 1954 /* set level and max in panel struct */ 1955 mutex_lock(&dev_priv->backlight_lock); 1956 ret = panel->backlight.setup(intel_connector, pipe); 1957 mutex_unlock(&dev_priv->backlight_lock); 1958 1959 if (ret) { 1960 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n", 1961 connector->name); 1962 return ret; 1963 } 1964 1965 panel->backlight.present = true; 1966 1967 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n", 1968 connector->name, 1969 enableddisabled(panel->backlight.enabled), 1970 panel->backlight.level, panel->backlight.max); 1971 1972 return 0; 1973 } 1974 1975 static void intel_panel_destroy_backlight(struct intel_panel *panel) 1976 { 1977 #ifndef __NetBSD__ /* XXX mipi */ 1978 /* dispose of the pwm */ 1979 if (panel->backlight.pwm) 1980 pwm_put(panel->backlight.pwm); 1981 #endif 1982 1983 panel->backlight.present = false; 1984 } 1985 1986 /* Set up chip specific backlight functions */ 1987 static void 1988 intel_panel_init_backlight_funcs(struct intel_panel *panel) 1989 { 1990 struct intel_connector *connector = 1991 container_of(panel, struct intel_connector, panel); 1992 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1993 1994 if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP && 1995 intel_dp_aux_init_backlight_funcs(connector) == 0) 1996 return; 1997 1998 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI && 1999 intel_dsi_dcs_init_backlight_funcs(connector) == 0) 2000 return; 2001 2002 if (IS_GEN9_LP(dev_priv)) { 2003 panel->backlight.setup = bxt_setup_backlight; 2004 panel->backlight.enable = bxt_enable_backlight; 2005 panel->backlight.disable = bxt_disable_backlight; 2006 panel->backlight.set = bxt_set_backlight; 2007 panel->backlight.get = bxt_get_backlight; 2008 panel->backlight.hz_to_pwm = bxt_hz_to_pwm; 2009 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) { 2010 panel->backlight.setup = cnp_setup_backlight; 2011 panel->backlight.enable = cnp_enable_backlight; 2012 panel->backlight.disable = cnp_disable_backlight; 2013 panel->backlight.set = bxt_set_backlight; 2014 panel->backlight.get = bxt_get_backlight; 2015 panel->backlight.hz_to_pwm = cnp_hz_to_pwm; 2016 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) { 2017 panel->backlight.setup = lpt_setup_backlight; 2018 panel->backlight.enable = lpt_enable_backlight; 2019 panel->backlight.disable = lpt_disable_backlight; 2020 panel->backlight.set = lpt_set_backlight; 2021 panel->backlight.get = lpt_get_backlight; 2022 if (HAS_PCH_LPT(dev_priv)) 2023 panel->backlight.hz_to_pwm = lpt_hz_to_pwm; 2024 else 2025 panel->backlight.hz_to_pwm = spt_hz_to_pwm; 2026 } else if (HAS_PCH_SPLIT(dev_priv)) { 2027 panel->backlight.setup = pch_setup_backlight; 2028 panel->backlight.enable = pch_enable_backlight; 2029 panel->backlight.disable = pch_disable_backlight; 2030 panel->backlight.set = pch_set_backlight; 2031 panel->backlight.get = pch_get_backlight; 2032 panel->backlight.hz_to_pwm = pch_hz_to_pwm; 2033 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { 2034 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) { 2035 #ifdef __NetBSD__ 2036 panic("no muppets supported, sorry"); 2037 #else 2038 panel->backlight.setup = pwm_setup_backlight; 2039 panel->backlight.enable = pwm_enable_backlight; 2040 panel->backlight.disable = pwm_disable_backlight; 2041 panel->backlight.set = pwm_set_backlight; 2042 panel->backlight.get = pwm_get_backlight; 2043 #endif 2044 } else { 2045 panel->backlight.setup = vlv_setup_backlight; 2046 panel->backlight.enable = vlv_enable_backlight; 2047 panel->backlight.disable = vlv_disable_backlight; 2048 panel->backlight.set = vlv_set_backlight; 2049 panel->backlight.get = vlv_get_backlight; 2050 panel->backlight.hz_to_pwm = vlv_hz_to_pwm; 2051 } 2052 } else if (IS_GEN(dev_priv, 4)) { 2053 panel->backlight.setup = i965_setup_backlight; 2054 panel->backlight.enable = i965_enable_backlight; 2055 panel->backlight.disable = i965_disable_backlight; 2056 panel->backlight.set = i9xx_set_backlight; 2057 panel->backlight.get = i9xx_get_backlight; 2058 panel->backlight.hz_to_pwm = i965_hz_to_pwm; 2059 } else { 2060 panel->backlight.setup = i9xx_setup_backlight; 2061 panel->backlight.enable = i9xx_enable_backlight; 2062 panel->backlight.disable = i9xx_disable_backlight; 2063 panel->backlight.set = i9xx_set_backlight; 2064 panel->backlight.get = i9xx_get_backlight; 2065 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm; 2066 } 2067 } 2068 2069 int intel_panel_init(struct intel_panel *panel, 2070 struct drm_display_mode *fixed_mode, 2071 struct drm_display_mode *downclock_mode) 2072 { 2073 intel_panel_init_backlight_funcs(panel); 2074 2075 panel->fixed_mode = fixed_mode; 2076 panel->downclock_mode = downclock_mode; 2077 2078 return 0; 2079 } 2080 2081 void intel_panel_fini(struct intel_panel *panel) 2082 { 2083 struct intel_connector *intel_connector = 2084 container_of(panel, struct intel_connector, panel); 2085 2086 intel_panel_destroy_backlight(panel); 2087 2088 if (panel->fixed_mode) 2089 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode); 2090 2091 if (panel->downclock_mode) 2092 drm_mode_destroy(intel_connector->base.dev, 2093 panel->downclock_mode); 2094 } 2095
Indexes created Sun Sep 21 20:09:37 GMT 2025