| /src/sys/external/bsd/sljit/dist/sljit_src/ |
| sljitNativeARM_32.c | 822 /* Creates an index in data_transfer_insts array. */
841 static const sljit_uw data_transfer_insts[16] = { variable in typeref:typename:const sljit_uw[16]
862 (data_transfer_insts[(type) & 0xf] | ((add) << 23) | ((wb) << (21 - 4)) | (reg_map[target_reg] << 12) | (reg_map[base_reg] << 16) | (arg))
867 (data_transfer_insts[(type) & 0xf] & 0x04000000)
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| sljitNativePPC_common.c | 535 /* Creates an index in data_transfer_insts array. */
746 static const sljit_ins data_transfer_insts[64 + 8] = { variable in typeref:typename:const sljit_ins[]
879 inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
889 inst = data_transfer_insts[inp_flags & MEM_MASK];
904 inst = data_transfer_insts[inp_flags & MEM_MASK];
999 inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
1007 inst = data_transfer_insts[inp_flags & MEM_MASK];
1076 inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
1092 inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK];
1121 inst = data_transfer_insts[(inp_flags | INDEXED) & MEM_MASK]
[all...] |
| sljitNativeSPARC_common.c | 403 /* Creates an index in data_transfer_insts array. */
498 static const sljit_ins data_transfer_insts[16 + 4] = { variable in typeref:typename:const sljit_ins[]
536 FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK]
625 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | dest | S1(arg2) | IMM(0), delay_slot);
627 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | dest | S1(base) | S2(arg2), delay_slot);
628 FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | dest | S1(base) | S2(arg2), delay_slot));
|
| sljitNativeMIPS_common.c | 499 /* Creates an index in data_transfer_insts array. */
673 static const sljit_ins data_transfer_insts[16 + 4] = { variable in typeref:typename:const sljit_ins[]
711 FAIL_IF(push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(arg & REG_MASK)
767 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar), delay_slot);
775 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
782 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot);
785 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
803 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | SA(tmp_ar) | TA(reg_ar), delay_slot);
826 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(base) | TA(reg_ar), delay_slot);
834 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | S(TMP_REG3) | TA(reg_ar), delay_slot)
[all...] |
| sljitNativeTILEGX_64.c | 312 static const tilegx_mnemonic data_transfer_insts[16] = { variable in typeref:typename:const tilegx_mnemonic[16]
1303 FAIL_IF(PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, ADDR_TMP_mapped));
1305 FAIL_IF(PB2(data_transfer_insts[flags & MEM_MASK], ADDR_TMP_mapped, reg_ar));
1373 return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, TMP_REG3_mapped);
1375 return PB2(data_transfer_insts[flags & MEM_MASK], TMP_REG3_mapped, reg_ar);
1384 return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, TMP_REG3_mapped);
1386 return PB2(data_transfer_insts[flags & MEM_MASK], TMP_REG3_mapped, reg_ar);
1391 return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, tmp_ar);
1393 return PB2(data_transfer_insts[flags & MEM_MASK], tmp_ar, reg_ar);
1399 return PB2(data_transfer_insts[flags & MEM_MASK], reg_ar, reg_map[base])
[all...] |
