1 /* $NetBSD: if_hme_pci.c,v 1.41 2025/10/04 04:44:21 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2000 Matthew R. Green 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * PCI front-end device driver for the HME ethernet device. 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: if_hme_pci.c,v 1.41 2025/10/04 04:44:21 thorpej Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/syslog.h> 39 #include <sys/device.h> 40 #include <sys/socket.h> 41 42 #include <net/if.h> 43 #include <net/if_dl.h> 44 #include <net/if_ether.h> 45 #include <net/if_media.h> 46 47 #include <dev/mii/mii.h> 48 #include <dev/mii/miivar.h> 49 50 #include <sys/intr.h> 51 52 #include <dev/pci/pcivar.h> 53 #include <dev/pci/pcireg.h> 54 #include <dev/pci/pcidevs.h> 55 56 #include <dev/ic/hmevar.h> 57 58 #define PCI_HME_BASEADDR PCI_BAR(0) 59 60 struct hme_pci_softc { 61 struct hme_softc hsc_hme; /* HME device */ 62 bus_space_tag_t hsc_memt; 63 bus_space_handle_t hsc_memh; 64 void *hsc_ih; 65 }; 66 67 int hmematch_pci(device_t, cfdata_t, void *); 68 void hmeattach_pci(device_t, device_t, void *); 69 70 CFATTACH_DECL_NEW(hme_pci, sizeof(struct hme_pci_softc), 71 hmematch_pci, hmeattach_pci, NULL, NULL); 72 73 int 74 hmematch_pci(device_t parent, cfdata_t cf, void *aux) 75 { 76 struct pci_attach_args *pa = aux; 77 78 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN && 79 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_HMENETWORK) 80 return (1); 81 82 return (0); 83 } 84 85 static inline int 86 hmepromvalid(uint8_t* buf) 87 { 88 return buf[0] == 0x18 && buf[1] == 0x00 && /* structure length */ 89 buf[2] == 0x00 && /* revision */ 90 (buf[3] == 0x00 || /* hme */ 91 buf[3] == 0x80) && /* qfe */ 92 buf[4] == PCI_SUBCLASS_NETWORK_ETHERNET && /* subclass code */ 93 buf[5] == PCI_CLASS_NETWORK; /* class code */ 94 } 95 96 static inline int 97 hmevpdoff(bus_space_tag_t romt, bus_space_handle_t romh, int vpdoff, int dev) 98 { 99 #define VPDLEN (3 + sizeof(struct pci_vpd) + ETHER_ADDR_LEN) 100 if (bus_space_read_1(romt, romh, vpdoff + VPDLEN) != 0x79 && 101 bus_space_read_1(romt, romh, vpdoff + 4 * VPDLEN) == 0x79) { 102 /* 103 * Use the Nth NA for the Nth HME on 104 * this SUNW,qfe. 105 */ 106 vpdoff += dev * VPDLEN; 107 } 108 return vpdoff; 109 } 110 111 void 112 hmeattach_pci(device_t parent, device_t self, void *aux) 113 { 114 struct pci_attach_args *pa = aux; 115 struct hme_pci_softc *hsc = device_private(self); 116 struct hme_softc *sc = &hsc->hsc_hme; 117 pci_intr_handle_t ih; 118 pcireg_t csr; 119 const char *intrstr; 120 int type; 121 struct pci_attach_args ebus_pa; 122 pcireg_t ebus_cl, ebus_id; 123 uint8_t *enaddr; 124 bus_space_tag_t romt; 125 bus_space_handle_t romh; 126 bus_size_t romsize; 127 uint8_t buf[64]; 128 int dataoff, vpdoff; 129 struct pci_vpd *vpd; 130 static const uint8_t promhdr[] = { 0x55, 0xaa }; 131 #define PROMHDR_PTR_DATA 0x18 132 static const uint8_t promdat[] = { 133 0x50, 0x43, 0x49, 0x52, /* "PCIR" */ 134 PCI_VENDOR_SUN & 0xff, PCI_VENDOR_SUN >> 8, 135 PCI_PRODUCT_SUN_HMENETWORK & 0xff, 136 PCI_PRODUCT_SUN_HMENETWORK >> 8 137 }; 138 #define PROMDATA_PTR_VPD 0x08 139 #define PROMDATA_DATA2 0x0a 140 char intrbuf[PCI_INTRSTR_LEN]; 141 142 sc->sc_dev = self; 143 144 aprint_normal(": Sun Happy Meal Ethernet, rev. %d\n", 145 PCI_REVISION(pa->pa_class)); 146 aprint_naive(": Ethernet controller\n"); 147 148 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 149 type = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_HME_BASEADDR); 150 151 /* 152 * enable io/memory-space accesses. this is kinda of gross; but 153 * the hme comes up with neither IO space enabled, or memory space. 154 */ 155 switch (type) { 156 case PCI_MAPREG_TYPE_MEM: 157 csr |= PCI_COMMAND_MEM_ENABLE; 158 sc->sc_bustag = pa->pa_memt; 159 break; 160 case PCI_MAPREG_TYPE_IO: 161 csr |= PCI_COMMAND_IO_ENABLE; 162 sc->sc_bustag = pa->pa_iot; 163 break; 164 } 165 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 166 csr | PCI_COMMAND_MEM_ENABLE); 167 168 sc->sc_dmatag = pa->pa_dmat; 169 170 sc->sc_pci = 1; /* XXXXX should all be done in bus_dma. */ 171 /* 172 * Map five register banks: 173 * 174 * bank 0: HME SEB registers: +0x0000 175 * bank 1: HME ETX registers: +0x2000 176 * bank 2: HME ERX registers: +0x4000 177 * bank 3: HME MAC registers: +0x6000 178 * bank 4: HME MIF registers: +0x7000 179 * 180 */ 181 182 if (pci_mapreg_map(pa, PCI_HME_BASEADDR, type, 0, 183 &hsc->hsc_memt, &hsc->hsc_memh, NULL, NULL) != 0) { 184 aprint_error_dev(self, "unable to map device registers\n"); 185 return; 186 } 187 sc->sc_seb = hsc->hsc_memh; 188 if (bus_space_subregion(hsc->hsc_memt, hsc->hsc_memh, 0x2000, 189 0x1000, &sc->sc_etx)) { 190 aprint_error_dev(self, "unable to subregion ETX registers\n"); 191 return; 192 } 193 if (bus_space_subregion(hsc->hsc_memt, hsc->hsc_memh, 0x4000, 194 0x1000, &sc->sc_erx)) { 195 aprint_error_dev(self, "unable to subregion ERX registers\n"); 196 return; 197 } 198 if (bus_space_subregion(hsc->hsc_memt, hsc->hsc_memh, 0x6000, 199 0x1000, &sc->sc_mac)) { 200 aprint_error_dev(self, "unable to subregion MAC registers\n"); 201 return; 202 } 203 if (bus_space_subregion(hsc->hsc_memt, hsc->hsc_memh, 0x7000, 204 0x1000, &sc->sc_mif)) { 205 aprint_error_dev(self, "unable to subregion MIF registers\n"); 206 return; 207 } 208 209 210 /* 211 * Check if we got a mac-address property passed 212 */ 213 if (ether_getaddr(self, sc->sc_enaddr)) { 214 goto got_eaddr; 215 } 216 217 /* 218 * Dig out VPD (vital product data) and acquire Ethernet address. 219 * The VPD of hme resides in the Boot PROM (PCI FCode) attached 220 * to the EBus interface. 221 */ 222 /* 223 * ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and later) 224 * chapter 2 describes the data structure. 225 */ 226 227 enaddr = NULL; 228 229 /* get a PCI tag for the EBus bridge (function 0 of the same device) */ 230 ebus_pa = *pa; 231 ebus_pa.pa_tag = pci_make_tag(pa->pa_pc, pa->pa_bus, pa->pa_device, 0); 232 233 ebus_cl = pci_conf_read(ebus_pa.pa_pc, ebus_pa.pa_tag, PCI_CLASS_REG); 234 ebus_id = pci_conf_read(ebus_pa.pa_pc, ebus_pa.pa_tag, PCI_ID_REG); 235 236 #define PCI_EBUS2_BOOTROM 0x10 237 if (PCI_CLASS(ebus_cl) == PCI_CLASS_BRIDGE && 238 PCI_PRODUCT(ebus_id) == PCI_PRODUCT_SUN_EBUS && 239 pci_mapreg_map(&ebus_pa, PCI_EBUS2_BOOTROM, PCI_MAPREG_TYPE_MEM, 240 BUS_SPACE_MAP_CACHEABLE | BUS_SPACE_MAP_PREFETCHABLE, 241 &romt, &romh, 0, &romsize) == 0) { 242 243 /* read PCI Expansion PROM Header */ 244 bus_space_read_region_1(romt, romh, 0, buf, sizeof buf); 245 if (memcmp(buf, promhdr, sizeof promhdr) == 0 && 246 (dataoff = (buf[PROMHDR_PTR_DATA] | 247 (buf[PROMHDR_PTR_DATA + 1] << 8))) >= 0x1c) { 248 249 /* read PCI Expansion PROM Data */ 250 bus_space_read_region_1(romt, romh, dataoff, 251 buf, sizeof buf); 252 if (memcmp(buf, promdat, sizeof promdat) == 0 && 253 hmepromvalid(buf + PROMDATA_DATA2) && 254 (vpdoff = (buf[PROMDATA_PTR_VPD] | 255 (buf[PROMDATA_PTR_VPD + 1] << 8))) >= 0x1c) { 256 257 /* 258 * The VPD of hme is not in PCI 2.2 standard 259 * format. The length in the resource header 260 * is in big endian, and resources are not 261 * properly terminated (only one resource 262 * and no end tag). 263 */ 264 vpdoff = hmevpdoff(romt, romh, vpdoff, 265 pa->pa_device); 266 /* read PCI VPD */ 267 bus_space_read_region_1(romt, romh, 268 vpdoff, buf, sizeof buf); 269 vpd = (void *)(buf + 3); 270 if (PCI_VPDRES_ISLARGE(buf[0]) && 271 PCI_VPDRES_LARGE_NAME(buf[0]) 272 == PCI_VPDRES_TYPE_VPD && 273 /* buf[1] == 0 && buf[2] == 9 && */ /*len*/ 274 vpd->vpd_key0 == 0x4e /* N */ && 275 vpd->vpd_key1 == 0x41 /* A */ && 276 vpd->vpd_len == ETHER_ADDR_LEN) { 277 /* 278 * Ethernet address found 279 */ 280 enaddr = buf + 6; 281 } 282 } 283 } 284 bus_space_unmap(romt, romh, romsize); 285 } 286 287 if (enaddr) { 288 memcpy(sc->sc_enaddr, enaddr, ETHER_ADDR_LEN); 289 goto got_eaddr; 290 } 291 292 aprint_error_dev(self, "no Ethernet address found\n"); 293 got_eaddr: 294 295 /* 296 * Map and establish our interrupt. 297 */ 298 if (pci_intr_map(pa, &ih) != 0) { 299 aprint_error_dev(self, "unable to map interrupt\n"); 300 return; 301 } 302 intrstr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf)); 303 hsc->hsc_ih = pci_intr_establish_xname(pa->pa_pc, ih, IPL_NET, hme_intr, 304 sc, device_xname(self)); 305 if (hsc->hsc_ih == NULL) { 306 aprint_error_dev(self, "unable to establish interrupt"); 307 if (intrstr != NULL) 308 aprint_error(" at %s", intrstr); 309 aprint_error("\n"); 310 return; 311 } 312 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 313 314 sc->sc_burst = 16; /* XXX */ 315 316 /* Finish off the attach. */ 317 hme_config(sc); 318 } 319
Indexes created Tue Oct 14 11:09:46 GMT 2025