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      1 /*	$NetBSD: efa.c,v 1.17 2023/12/20 00:40:42 thorpej Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2011 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Radoslaw Kujawa.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 /*
     33  * Driver for FastATA 1200 EIDE controller, manufactured by ELBOX Computer.
     34  *
     35  * Gayle-related stuff inspired by wdc_amiga.c written by Michael L. Hitch
     36  * and Aymeric Vincent.
     37  */
     38 
     39 #include <sys/cdefs.h>
     40 
     41 #include <sys/types.h>
     42 #include <sys/param.h>
     43 #include <sys/systm.h>
     44 #include <sys/device.h>
     45 #include <sys/bus.h>
     46 #include <sys/proc.h>
     47 #include <sys/kernel.h>
     48 #include <sys/kthread.h>
     49 
     50 #include <machine/cpu.h>
     51 #include <machine/intr.h>
     52 #include <sys/bswap.h>
     53 
     54 #include <amiga/amiga/cia.h>
     55 #include <amiga/amiga/custom.h>
     56 #include <amiga/amiga/device.h>
     57 #include <amiga/amiga/gayle.h>
     58 #include <amiga/dev/zbusvar.h>
     59 
     60 #include <dev/ata/atavar.h>
     61 #include <dev/ic/wdcvar.h>
     62 
     63 #include <amiga/dev/efareg.h>
     64 #include <amiga/dev/efavar.h>
     65 
     66 #define EFA_32BIT_IO 1
     67 /* #define EFA_NO_INTR 1 */
     68 /* #define EFA_DEBUG 1 */
     69 
     70 int		efa_probe(device_t, cfdata_t, void *);
     71 void		efa_attach(device_t, device_t, void *);
     72 int		efa_intr(void *);
     73 int		efa_intr_soft(void *arg);
     74 static void	efa_set_opts(struct efa_softc *sc);
     75 static bool	efa_mapbase(struct efa_softc *sc);
     76 static bool	efa_mapreg_gayle(struct efa_softc *sc);
     77 static bool	efa_mapreg_native(struct efa_softc *sc);
     78 static void	efa_fata_subregion_pio0(struct wdc_regs *wdr_fata);
     79 static void	efa_fata_subregion_pion(struct wdc_regs *wdr_fata, bool data32);
     80 static void	efa_setup_channel(struct ata_channel *chp);
     81 static void	efa_attach_channel(struct efa_softc *sc, int i);
     82 static void	efa_select_regset(struct efa_softc *sc, int chnum,
     83 		    uint8_t piomode);
     84 static void	efa_poll_kthread(void *arg);
     85 static bool	efa_compare_status(void);
     86 #ifdef EFA_DEBUG
     87 static void	efa_debug_print_regmapping(struct wdc_regs *wdr_fata);
     88 #endif /* EFA_DEBUG */
     89 
     90 CFATTACH_DECL_NEW(efa, sizeof(struct efa_softc),
     91     efa_probe, efa_attach, NULL, NULL);
     92 
     93 #define PIO_NSUPP		0xFFFFFFFF
     94 
     95 static const bus_addr_t		pio_offsets[] =
     96     { FATA1_PIO0_OFF, PIO_NSUPP, PIO_NSUPP, FATA1_PIO3_OFF, FATA1_PIO4_OFF,
     97       FATA1_PIO5_OFF };
     98 static const unsigned int	wdr_offsets_pio0[] =
     99     { FATA1_PIO0_OFF_DATA, FATA1_PIO0_OFF_ERROR, FATA1_PIO0_OFF_SECCNT,
    100       FATA1_PIO0_OFF_SECTOR, FATA1_PIO0_OFF_CYL_LO, FATA1_PIO0_OFF_CYL_HI,
    101       FATA1_PIO0_OFF_SDH, FATA1_PIO0_OFF_COMMAND };
    102 static const unsigned int	wdr_offsets_pion[] =
    103     { FATA1_PION_OFF_DATA, FATA1_PION_OFF_ERROR, FATA1_PION_OFF_SECCNT,
    104       FATA1_PION_OFF_SECTOR, FATA1_PION_OFF_CYL_LO, FATA1_PION_OFF_CYL_HI,
    105       FATA1_PION_OFF_SDH, FATA1_PION_OFF_COMMAND };
    106 
    107 int
    108 efa_probe(device_t parent, cfdata_t cfp, void *aux)
    109 {
    110 	/*
    111 	 * FastATA 1200 uses portions of Gayle IDE interface, and efa driver
    112 	 * can't coexist with wdc_amiga. Match "wdc" on an A1200, because
    113 	 * FastATA 1200 does not autoconfigure.
    114 	 */
    115 	if (!matchname(aux, "wdc") || !is_a1200())
    116 		return(0);
    117 
    118 	if (!efa_compare_status())
    119 		return(0);
    120 
    121 #ifdef EFA_DEBUG
    122 	aprint_normal("efa_probe succeeded\n");
    123 #endif /* EFA_DEBUG */
    124 
    125 	return 100;
    126 }
    127 
    128 void
    129 efa_attach(device_t parent, device_t self, void *aux)
    130 {
    131 	int i;
    132 	struct efa_softc *sc = device_private(self);
    133 
    134 	aprint_normal(": ELBOX FastATA 1200\n");
    135 
    136 	gayle_init();
    137 
    138 	efa_set_opts(sc);
    139 
    140 	if (!efa_mapbase(sc)) {
    141 		aprint_error_dev(self, "couldn't map base addresses\n");
    142 		return;
    143 	}
    144 	if (!efa_mapreg_gayle(sc)) {
    145 		aprint_error_dev(self, "couldn't map Gayle registers\n");
    146 		return;
    147 	}
    148 	if (!efa_mapreg_native(sc)) {
    149 		aprint_error_dev(self, "couldn't map FastATA registers\n");
    150 		return;
    151 	}
    152 
    153 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 5;
    154 	sc->sc_wdcdev.sc_atac.atac_nchannels = FATA1_CHANNELS;
    155 	sc->sc_wdcdev.sc_atac.atac_set_modes = efa_setup_channel;
    156 	sc->sc_wdcdev.sc_atac.atac_dev = self;
    157 	sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist;
    158 	sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16;
    159 	sc->sc_wdcdev.wdc_maxdrives = 2;
    160 
    161 	if (sc->sc_32bit_io)
    162 		sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA32;
    163 
    164 	/*
    165 	 * The following should work for polling mode, but it does not.
    166 	 * if (sc->sc_no_intr)
    167 	 *	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_NOIRQ;
    168 	 */
    169 
    170 	wdc_allocate_regs(&sc->sc_wdcdev);
    171 
    172 	for (i = 0; i < FATA1_CHANNELS; i++)
    173 		efa_attach_channel(sc, i);
    174 
    175 	if (sc->sc_no_intr) {
    176 		sc->sc_fata_softintr = softint_establish(SOFTINT_BIO,
    177 		    (void (*)(void *))efa_intr_soft, sc);
    178 		if (sc->sc_fata_softintr == NULL) {
    179 			aprint_error_dev(self, "couldn't create soft intr\n");
    180 			return;
    181 		}
    182 		if (kthread_create(PRI_NONE, 0, NULL, efa_poll_kthread, sc,
    183 		    NULL, "efa")) {
    184 			aprint_error_dev(self, "couldn't create kthread\n");
    185 			return;
    186 		}
    187 	} else {
    188 		sc->sc_isr.isr_intr = efa_intr;
    189 		sc->sc_isr.isr_arg = sc;
    190 		sc->sc_isr.isr_ipl = 2;
    191 		add_isr (&sc->sc_isr);
    192 		gayle_intr_enable_set(GAYLE_INT_IDE);
    193 	}
    194 
    195 }
    196 
    197 static void
    198 efa_attach_channel(struct efa_softc *sc, int chnum)
    199 {
    200 #ifdef EFA_DEBUG
    201 	device_t self;
    202 
    203 	self = sc->sc_wdcdev.sc_atac.atac_dev;
    204 #endif /* EFA_DEBUG */
    205 
    206 	sc->sc_chanlist[chnum] = &sc->sc_ports[chnum].chan;
    207 
    208 	sc->sc_ports[chnum].chan.ch_channel = chnum;
    209 	sc->sc_ports[chnum].chan.ch_atac = &sc->sc_wdcdev.sc_atac;
    210 
    211 	if (!sc->sc_32bit_io)
    212 		efa_select_regset(sc, chnum, 0); /* Start in PIO0. */
    213 	else
    214 		efa_select_regset(sc, chnum, 3);
    215 
    216 	wdc_init_shadow_regs(CHAN_TO_WDC_REGS(&sc->sc_ports[chnum].chan));
    217 
    218 	wdcattach(&sc->sc_ports[chnum].chan);
    219 
    220 #ifdef EFA_DEBUG
    221 	aprint_normal_dev(self, "done init for channel %d\n", chnum);
    222 #endif
    223 
    224 }
    225 
    226 /* TODO: convert to callout(9) */
    227 static void
    228 efa_poll_kthread(void *arg)
    229 {
    230 	struct efa_softc *sc = arg;
    231 
    232 	for (;;) {
    233 		/* TODO: actually check if interrupt status register is set */
    234 		softint_schedule(sc->sc_fata_softintr);
    235 		/* TODO: convert to kpause */
    236 		tsleep(arg, PWAIT, "efa_poll", hz);
    237 	}
    238 }
    239 
    240 static void
    241 efa_set_opts(struct efa_softc *sc)
    242 {
    243 	device_t self;
    244 
    245 	self = sc->sc_wdcdev.sc_atac.atac_dev;
    246 
    247 #ifdef EFA_32BIT_IO
    248 	sc->sc_32bit_io = true;
    249 #else
    250 	sc->sc_32bit_io = false;
    251 #endif /* EFA_32BIT_IO */
    252 
    253 #ifdef EFA_NO_INTR
    254 	sc->sc_no_intr = true;		/* XXX: not yet! */
    255 #else
    256 	sc->sc_no_intr = false;
    257 #endif /* EFA_NO_INTR */
    258 
    259 	if (sc->sc_no_intr)
    260 		aprint_verbose_dev(self, "hardware interrupt disabled\n");
    261 
    262 	if (sc->sc_32bit_io)
    263 		aprint_verbose_dev(self, "32-bit I/O enabled\n");
    264 }
    265 
    266 int
    267 efa_intr_soft(void *arg)
    268 {
    269 	int ret = 0;
    270 	struct efa_softc *sc = (struct efa_softc *)arg;
    271 
    272 	/* TODO: check which channel needs servicing */
    273 	/*
    274 	uint8_t fataintreq;
    275 	fataintreq = bus_space_read_1(sc->sc_ports[0].wdr[piom].cmd_iot,
    276 	sc->sc_ports[chnum].intst[piom], 0);
    277 	*/
    278 
    279 	ret = wdcintr(&sc->sc_ports[0].chan);
    280 	ret = wdcintr(&sc->sc_ports[1].chan);
    281 
    282 	return ret;
    283 }
    284 
    285 int
    286 efa_intr(void *arg)
    287 {
    288 	struct efa_softc *sc = (struct efa_softc *)arg;
    289 	int r1, r2, ret;
    290 	uint8_t intreq;
    291 
    292 	intreq = gayle_intr_status();
    293 	ret = 0;
    294 
    295 	if (intreq & GAYLE_INT_IDE) {
    296 		gayle_intr_ack(0x7C | (intreq & 0x03));
    297 		/* How to check which channel caused interrupt?
    298 		 * Interrupt status register is not very useful here. */
    299 		r1 = wdcintr(&sc->sc_ports[0].chan);
    300 		r2 = wdcintr(&sc->sc_ports[1].chan);
    301 		ret = r1 | r2;
    302 	}
    303 
    304 	return ret;
    305 }
    306 
    307 static bool
    308 efa_mapbase(struct efa_softc *sc)
    309 {
    310 	static struct bus_space_tag fata_cmd_iot;
    311 	static struct bus_space_tag gayle_cmd_iot;
    312 	int i, j;
    313 #ifdef EFA_DEBUG
    314 	device_t self;
    315 
    316 	self = sc->sc_wdcdev.sc_atac.atac_dev;
    317 #endif /* EFA_DEBUG */
    318 
    319 	gayle_cmd_iot.base = (bus_addr_t) ztwomap(GAYLE_IDE_BASE + 2);
    320 	gayle_cmd_iot.absm = &amiga_bus_stride_4swap;
    321 	fata_cmd_iot.base = (bus_addr_t) ztwomap(FATA1_BASE);
    322 	fata_cmd_iot.absm = &amiga_bus_stride_4swap;
    323 
    324 #ifdef EFA_DEBUG
    325 	aprint_normal_dev(self, "Gayle %x -> %x, FastATA %x -> %x\n",
    326 	    GAYLE_IDE_BASE, gayle_cmd_iot.base, FATA1_BASE, fata_cmd_iot.base);
    327 #endif
    328 
    329 	if (!gayle_cmd_iot.base)
    330 		return false;
    331 	if (!fata_cmd_iot.base)
    332 		return false;
    333 
    334 	sc->sc_gayle_wdc_regs.cmd_iot = &gayle_cmd_iot;
    335 	sc->sc_gayle_wdc_regs.ctl_iot = &gayle_cmd_iot;
    336 
    337 	for (i = 0; i < FATA1_CHANNELS; i++) {
    338 		for (j = 0; j < PIO_COUNT; j++) {
    339 			sc->sc_ports[i].wdr[j].cmd_iot = &fata_cmd_iot;
    340 			sc->sc_ports[i].wdr[j].data32iot = &fata_cmd_iot;
    341 			sc->sc_ports[i].wdr[j].ctl_iot = &gayle_cmd_iot;
    342 		}
    343 	}
    344 
    345 	return true;
    346 }
    347 
    348 
    349 /* Gayle IDE register mapping, we need it anyway. */
    350 static bool
    351 efa_mapreg_gayle(struct efa_softc *sc)
    352 {
    353 	int i;
    354 
    355 	struct wdc_regs *wdr = &sc->sc_gayle_wdc_regs;
    356 
    357 	if (bus_space_map(wdr->cmd_iot, 0, 0x40, 0,
    358 	    &wdr->cmd_baseioh)) {
    359 		return false;
    360 	}
    361 
    362 	for (i = 0; i < WDC_NREG; i++) {
    363 		if (bus_space_subregion(wdr->cmd_iot,
    364 		    wdr->cmd_baseioh, i, i == 0 ? 4 : 1,
    365 		    &wdr->cmd_iohs[i]) != 0) {
    366 
    367 			bus_space_unmap(wdr->cmd_iot,
    368 			    wdr->cmd_baseioh, 0x40);
    369 			return false;
    370 		}
    371 	}
    372 
    373 	if (bus_space_subregion(wdr->cmd_iot,
    374 	    wdr->cmd_baseioh, 0x406, 1, &wdr->ctl_ioh))
    375 		return false;
    376 
    377 	return true;
    378 }
    379 
    380 /* Native FastATA register mapping, suitable for PIO modes 0 to 5. */
    381 static bool
    382 efa_mapreg_native(struct efa_softc *sc)
    383 {
    384 	struct wdc_regs *wdr_gayle = &sc->sc_gayle_wdc_regs;
    385 	struct wdc_regs *wdr_fata;
    386 	int i,j;
    387 #ifdef EFA_DEBUG
    388 	device_t self;
    389 
    390 	self = sc->sc_wdcdev.sc_atac.atac_dev;
    391 #endif /* EFA_DEBUG */
    392 
    393 	for (i = 0; i < FATA1_CHANNELS; i++) {
    394 
    395 		for (j = 0; j < PIO_COUNT; j++) {
    396 
    397 			wdr_fata = &sc->sc_ports[i].wdr[j];
    398 			sc->sc_ports[i].mode_ok[j] = false;
    399 
    400 			if (pio_offsets[j] == PIO_NSUPP) {
    401 #ifdef EFA_DEBUG
    402 				aprint_normal_dev(self,
    403 				    "Skipping mapping for PIO mode %x\n", j);
    404 #endif
    405 				continue;
    406 			}
    407 
    408 			if (bus_space_map(wdr_fata->cmd_iot,
    409 			    pio_offsets[j] + FATA1_CHAN_SIZE * i,
    410 			    FATA1_CHAN_SIZE, 0, &wdr_fata->cmd_baseioh)) {
    411 			    return false;
    412 			}
    413 #ifdef EFA_DEBUG
    414 			aprint_normal_dev(self,
    415 			    "Chan %x PIO mode %x mapped %x -> %x\n",
    416 			    i, j, (bus_addr_t) kvtop((void*)
    417 			    wdr_fata->cmd_baseioh), (unsigned int)
    418 			    wdr_fata->cmd_baseioh);
    419 #endif
    420 
    421 			sc->sc_ports[i].mode_ok[j] = true;
    422 
    423 			if (j == 0)
    424 				efa_fata_subregion_pio0(wdr_fata);
    425 			else {
    426 				if (sc->sc_32bit_io)
    427 					efa_fata_subregion_pion(wdr_fata,
    428 					    true);
    429 				else
    430 					efa_fata_subregion_pion(wdr_fata,
    431 					    false);
    432 
    433 				bus_space_subregion(wdr_fata->cmd_iot,
    434 				    wdr_fata->cmd_baseioh, FATA1_PION_OFF_INTST,
    435 				    1, &sc->sc_ports[i].intst[j]);
    436 			}
    437 
    438 			/* No 32-bit register for PIO0 ... */
    439 			if (j == 0 && sc->sc_32bit_io)
    440 				sc->sc_ports[i].mode_ok[j] = false;
    441 
    442 			wdr_fata->ctl_ioh = wdr_gayle->ctl_ioh;
    443 		};
    444 	}
    445 	return true;
    446 }
    447 
    448 
    449 static void
    450 efa_fata_subregion_pio0(struct wdc_regs *wdr_fata)
    451 {
    452 	int i;
    453 
    454 	for (i = 0; i < WDC_NREG; i++)
    455 		bus_space_subregion(wdr_fata->cmd_iot,
    456 		    wdr_fata->cmd_baseioh, wdr_offsets_pio0[i],
    457 		    i == 0 ? 4 : 1, &wdr_fata->cmd_iohs[i]);
    458 }
    459 
    460 static void
    461 efa_fata_subregion_pion(struct wdc_regs *wdr_fata, bool data32)
    462 {
    463 	int i;
    464 
    465 	if (data32)
    466 		bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
    467 		    FATA1_PION_OFF_DATA32, 8, &wdr_fata->data32ioh);
    468 
    469 	for (i = 0; i < WDC_NREG; i++)
    470 		bus_space_subregion(wdr_fata->cmd_iot,
    471 		    wdr_fata->cmd_baseioh, wdr_offsets_pion[i],
    472 		    i == 0 ? 4 : 1, &wdr_fata->cmd_iohs[i]);
    473 }
    474 
    475 static void
    476 efa_setup_channel(struct ata_channel *chp)
    477 {
    478 	int drive, chnum;
    479 	uint8_t mode;
    480 	struct atac_softc *atac;
    481 	struct ata_drive_datas *drvp;
    482 	struct efa_softc *sc;
    483 	int ipl;
    484 #ifdef EFA_DEBUG
    485 	device_t self;
    486 #endif /* EFA_DEBUG */
    487 
    488 	chnum = chp->ch_channel;
    489 	atac = chp->ch_atac;
    490 
    491 	sc = device_private(atac->atac_dev);
    492 
    493 	mode = 5; /* start with fastest possible setting */
    494 
    495 #ifdef EFA_DEBUG
    496 	self = sc->sc_wdcdev.sc_atac.atac_dev;
    497 	aprint_normal_dev(self, "efa_setup_channel for ch %d\n",
    498 	    chnum);
    499 #endif /* EFA_DEBUG */
    500 
    501 	/* We might be in the middle of something... so raise IPL. */
    502 	ipl = splvm();
    503 
    504 	for (drive = 0; drive < 2; drive++) {
    505 		drvp = &chp->ch_drive[drive];
    506 
    507 		if (drvp->drive_type == ATA_DRIVET_NONE)
    508 			continue; /* nothing to see here */
    509 
    510 		if (drvp->PIO_cap < mode)
    511 			mode = drvp->PIO_cap;
    512 
    513 		/* TODO: check if sc_ports->mode_ok */
    514 
    515 #ifdef EFA_DEBUG
    516 		aprint_normal_dev(self, "drive %d supports %d\n",
    517 		    drive, drvp->PIO_cap);
    518 #endif /* EFA_DEBUG */
    519 
    520 		drvp->PIO_mode = mode;
    521 	}
    522 
    523 	/* Change FastATA register set. */
    524 	efa_select_regset(sc, chnum, mode);
    525 	/* re-init shadow regs */
    526 	wdc_init_shadow_regs(CHAN_TO_WDC_REGS(&sc->sc_ports[chnum].chan));
    527 
    528 	splx(ipl);
    529 }
    530 
    531 static void
    532 efa_select_regset(struct efa_softc *sc, int chnum, uint8_t piomode)
    533 {
    534 	struct wdc_softc *wdc;
    535 #ifdef EFA_DEBUG
    536 	device_t self;
    537 
    538 	self = sc->sc_wdcdev.sc_atac.atac_dev;
    539 #endif /* EFA_DEBUG */
    540 
    541 	wdc = CHAN_TO_WDC(&sc->sc_ports[chnum].chan);
    542 	wdc->regs[chnum] = sc->sc_ports[chnum].wdr[piomode];
    543 
    544 #ifdef EFA_DEBUG
    545 	aprint_normal_dev(self, "switched ch %d to PIO %d\n",
    546 	    chnum, piomode);
    547 
    548 	efa_debug_print_regmapping(&wdc->regs[chnum]);
    549 #endif /* EFA_DEBUG */
    550 }
    551 
    552 #ifdef EFA_DEBUG
    553 static void
    554 efa_debug_print_regmapping(struct wdc_regs *wdr_fata)
    555 {
    556 	int i;
    557 	aprint_normal("base %x->%x",
    558 	    (bus_addr_t) kvtop((void*) wdr_fata->cmd_baseioh),
    559 	    (bus_addr_t) wdr_fata->cmd_baseioh);
    560 	for (i = 0; i < WDC_NREG; i++) {
    561 		aprint_normal("reg %x, %x->%x, ", i,
    562 		    (bus_addr_t) kvtop((void*) wdr_fata->cmd_iohs[i]),
    563 		    (bus_addr_t) wdr_fata->cmd_iohs[i]);
    564 	}
    565 	aprint_normal("\n");
    566 }
    567 #endif /* EFA_DEBUG */
    568 
    569 /* Compare the values of (status) command register in PIO0, PIO3 sets. */
    570 static bool
    571 efa_compare_status(void)
    572 {
    573 	uint8_t cmd0, cmd3;
    574 	struct bus_space_tag fata_bst;
    575 	bus_space_tag_t fata_iot;
    576 	bus_space_handle_t cmd0_ioh, cmd3_ioh;
    577 	bool rv;
    578 
    579 	rv = false;
    580 
    581 	fata_bst.base = (bus_addr_t) ztwomap(FATA1_BASE);
    582 	fata_bst.absm = &amiga_bus_stride_4swap;
    583 
    584 	fata_iot = &fata_bst;
    585 
    586 	if (bus_space_map(fata_iot, pio_offsets[0], FATA1_CHAN_SIZE, 0,
    587 	    &cmd0_ioh))
    588 		return false;
    589 	if (bus_space_map(fata_iot, pio_offsets[3], FATA1_CHAN_SIZE, 0,
    590 	    &cmd3_ioh))
    591 		return false;
    592 
    593 #ifdef EFA_DEBUG
    594 	aprint_normal("probing for FastATA at %x, %x: ", (bus_addr_t) cmd0_ioh,
    595 	    (bus_addr_t) cmd3_ioh);
    596 #endif /* EFA_DEBUG */
    597 
    598 	cmd0 = bus_space_read_1(fata_iot, cmd0_ioh, FATA1_PIO0_OFF_COMMAND);
    599 	cmd3 = bus_space_read_1(fata_iot, cmd3_ioh, FATA1_PION_OFF_COMMAND);
    600 
    601 	if (cmd0 == cmd3)
    602 		rv = true;
    603 
    604 	if ( (cmd0 == 0xFF) || (cmd0 == 0x00) ) {
    605 		/* Assume there's nothing there... */
    606 		rv = false;
    607 	}
    608 
    609 #ifdef EFA_DEBUG
    610 	aprint_normal("cmd0 %x, cmd3 %x\n", cmd0, cmd3);
    611 #endif /* EFA_DEBUG */
    612 
    613 	bus_space_unmap(fata_iot, pio_offsets[0], FATA1_CHAN_SIZE);
    614 	bus_space_unmap(fata_iot, pio_offsets[3], FATA1_CHAN_SIZE);
    615 
    616 	return rv;
    617 }
    618 
    619