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      1 /*	$NetBSD: exynos_rtc.c,v 1.5 2025/09/07 21:45:12 thorpej Exp $ */
      2 
      3 /*-
      4 * Copyright (c) 2015 The NetBSD Foundation, Inc.
      5 * All rights reserved.
      6 *
      7 * This code is derived from software contributed to The NetBSD Foundation
      8 * by Marty Fouts
      9 *
     10 * Redistribution and use in source and binary forms, with or without
     11 * modification, are permitted provided that the following conditions
     12 * are met:
     13 * 1. Redistributions of source code must retain the above copyright
     14 *    notice, this list of conditions and the following disclaimer.
     15 * 2. Redistributions in binary form must reproduce the above copyright
     16 *    notice, this list of conditions and the following disclaimer in the
     17 *    documentation and/or other materials provided with the distribution.
     18 *
     19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29 * POSSIBILITY OF SUCH DAMAGE.
     30 */
     31 
     32 #include "opt_exynos.h"
     33 #include "opt_arm_debug.h"
     34 #include "gpio.h"
     35 
     36 #include <sys/cdefs.h>
     37 __KERNEL_RCSID(1, "$NetBSD: exynos_rtc.c,v 1.5 2025/09/07 21:45:12 thorpej Exp $");
     38 
     39 #include <sys/param.h>
     40 #include <sys/bus.h>
     41 #include <sys/device.h>
     42 #include <sys/intr.h>
     43 #include <sys/systm.h>
     44 #include <sys/kernel.h>
     45 #include <sys/kmem.h>
     46 
     47 #include <dev/clock_subr.h>
     48 
     49 #include <arm/samsung/exynos_reg.h>
     50 #include <arm/samsung/exynos_intr.h>
     51 
     52 #include <dev/fdt/fdtvar.h>
     53 
     54 struct exynos_rtc_softc {
     55 	device_t		sc_dev;
     56 	bus_space_tag_t		sc_bst;
     57 	bus_space_handle_t	sc_bsh;
     58 
     59 	struct todr_chip_handle sc_todr;
     60 };
     61 
     62 static int exynos_rtc_match(device_t, cfdata_t, void *);
     63 static void exynos_rtc_attach(device_t, device_t, void *);
     64 
     65 static int	exynos_rtc_gettime(todr_chip_handle_t, struct timeval *);
     66 static int	exynos_rtc_settime(todr_chip_handle_t, struct timeval *);
     67 
     68 CFATTACH_DECL_NEW(exynos_rtc, sizeof(struct exynos_rtc_softc),
     69 	exynos_rtc_match, exynos_rtc_attach, NULL, NULL);
     70 
     71 #define RTC_READ(sc, reg)	\
     72 	bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
     73 #define RTC_WRITE(sc, reg, val)	\
     74 	bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
     75 
     76 static const struct device_compatible_entry compat_data[] = {
     77 	{ .compat = "samsung,s3c6410-rtc" },
     78 	DEVICE_COMPAT_EOL
     79 };
     80 
     81 static int
     82 exynos_rtc_match(device_t parent, cfdata_t cf, void *aux)
     83 {
     84 	struct fdt_attach_args * const faa = aux;
     85 
     86 	return of_compatible_match(faa->faa_phandle, compat_data);
     87 }
     88 
     89 static void
     90 exynos_rtc_attach(device_t parent, device_t self, void *aux)
     91 {
     92 	struct exynos_rtc_softc * const sc
     93 		= kmem_zalloc(sizeof(*sc), KM_SLEEP);
     94 	struct fdt_attach_args * const faa = aux;
     95 	bus_addr_t addr;
     96 	bus_size_t size;
     97 	int error;
     98 
     99 	if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) {
    100 		aprint_error(": couldn't get registers\n");
    101 		return;
    102 	}
    103 
    104 	aprint_normal(" @ 0x%08x", (uint)addr);
    105 	sc->sc_dev = self;
    106 	sc->sc_bst = faa->faa_bst;
    107 	error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh);
    108 	if (error) {
    109 		aprint_error(": couldn't map %#" PRIxBUSADDR ": %d",
    110 			     addr, error);
    111 		return;
    112 	}
    113 
    114 	aprint_naive("\n");
    115 	aprint_normal(": RTC\n");
    116 
    117 	sc->sc_todr.todr_gettime = exynos_rtc_gettime;
    118 	sc->sc_todr.todr_settime = exynos_rtc_settime;
    119 	sc->sc_todr.todr_dev = self;
    120 	todr_attach(&sc->sc_todr);
    121 
    122 }
    123 
    124 static int
    125 exynos_rtc_gettime(todr_chip_handle_t tch, struct timeval *tv)
    126 {
    127 	struct exynos_rtc_softc * const sc = device_private(tch->todr_dev);
    128 
    129 	tv->tv_sec = RTC_READ(sc, EXYNOS5_RTC_OFFSET);
    130 	tv->tv_usec = 0;
    131 
    132 	return 0;
    133 }
    134 
    135 static int
    136 exynos_rtc_settime(todr_chip_handle_t tch, struct timeval *tv)
    137 {
    138 	struct exynos_rtc_softc * const sc = device_private(tch->todr_dev);
    139 	int retry = 500;
    140 
    141 	while (--retry > 0) {
    142 		if (!RTC_READ(sc, EXYNOS5_RTC_OFFSET))
    143 			break;
    144 		delay(1);
    145 	}
    146 	if (retry == 0) {
    147 		device_printf(sc->sc_dev, "RTC write failed (BUSY)\n");
    148 		return ETIMEDOUT;
    149 	}
    150 
    151 	RTC_WRITE(sc, EXYNOS5_RTC_OFFSET, tv->tv_sec);
    152 
    153 	return 0;
    154 }
    155