| /src/external/gpl3/binutils/dist/opcodes/ |
| sparc-opc.c | 1452 #define fmrrd(opcode, mask, lose, flags) /* v9 */ \
1460 fmrrd(mop, F3(2, 0x35, 0)|OPF_LOW5(6)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~6)|RCOND(~(mask)), (flags)) /* v9 */
1450 #define fmrrd macro
|
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| sparc-opc.c | 1452 #define fmrrd(opcode, mask, lose, flags) /* v9 */ \
1460 fmrrd(mop, F3(2, 0x35, 0)|OPF_LOW5(6)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~6)|RCOND(~(mask)), (flags)) /* v9 */
1450 #define fmrrd macro
|
| /src/external/gpl3/gdb/dist/opcodes/ |
| sparc-opc.c | 1452 #define fmrrd(opcode, mask, lose, flags) /* v9 */ \
1460 fmrrd(mop, F3(2, 0x35, 0)|OPF_LOW5(6)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~6)|RCOND(~(mask)), (flags)) /* v9 */
1450 #define fmrrd macro
|
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| sparc-opc.c | 1452 #define fmrrd(opcode, mask, lose, flags) /* v9 */ \
1460 fmrrd(mop, F3(2, 0x35, 0)|OPF_LOW5(6)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~6)|RCOND(~(mask)), (flags)) /* v9 */
1450 #define fmrrd macro
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 2203 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, local
2206 RegsToPass.push_back(std::make_pair(VA.getLocReg(), fmrrd.getValue(id)));
2209 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), fmrrd.getValue(1-id)));
2216 MemOpChains.push_back(LowerMemOpCallTo(Chain, StackPtr, fmrrd.getValue(1-id),
3070 // Legalize ret f64 -> ret 2 x i32. We always have fmrrd if f64 is
3072 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, local
3075 fmrrd.getValue(isLittleEndian ? 0 : 1), Flag);
3080 fmrrd.getValue(isLittleEndian ? 1 : 0), Flag);
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