1 /* $NetBSD: ki2c.c,v 1.43 2025/09/21 18:03:28 thorpej Exp $ */ 2 /* Id: ki2c.c,v 1.7 2002/10/05 09:56:05 tsubai Exp */ 3 4 /*- 5 * Copyright (c) 2001 Tsubai Masanari. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include <sys/param.h> 31 #include <sys/device.h> 32 #include <sys/systm.h> 33 #include <sys/mutex.h> 34 35 #include <dev/ofw/openfirm.h> 36 #include <machine/autoconf.h> 37 #include <powerpc/pic/picvar.h> 38 39 #include "opt_ki2c.h" 40 #include <macppc/dev/ki2cvar.h> 41 42 #ifdef KI2C_DEBUG 43 #define DPRINTF printf 44 #else 45 #define DPRINTF while (0) printf 46 #endif 47 48 #define KI2C_EXEC_MAX_CMDLEN 32 49 #define KI2C_EXEC_MAX_BUFLEN 32 50 51 int ki2c_match(device_t, cfdata_t, void *); 52 void ki2c_attach(device_t, device_t, void *); 53 inline uint8_t ki2c_readreg(struct ki2c_softc *, int); 54 inline void ki2c_writereg(struct ki2c_softc *, int, uint8_t); 55 u_int ki2c_getmode(struct ki2c_softc *); 56 void ki2c_setmode(struct ki2c_softc *, u_int); 57 u_int ki2c_getspeed(struct ki2c_softc *); 58 void ki2c_setspeed(struct ki2c_softc *, u_int); 59 int ki2c_intr(void *); 60 int ki2c_poll(struct ki2c_softc *, int); 61 int ki2c_start(struct ki2c_softc *, int, int, void *, int); 62 int ki2c_read(struct ki2c_softc *, int, int, void *, int); 63 int ki2c_write(struct ki2c_softc *, int, int, void *, int); 64 65 /* I2C glue */ 66 static int ki2c_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t, 67 void *, size_t, int); 68 69 static void 70 ki2c_select_channel(struct ki2c_softc *sc, int channel) 71 { 72 uint8_t val = channel ? 0x10 : 0x00; 73 74 /* We handle the subaddress stuff ourselves. */ 75 ki2c_setmode(sc, val | I2C_STDMODE); 76 } 77 78 static int 79 ki2c_acquire_bus(void *v, int flags) 80 { 81 struct ki2c_channel *ch = v; 82 struct ki2c_softc *sc = ch->ch_sc; 83 84 int error = iic_acquire_bus_lock(&sc->sc_mux_lock, flags); 85 if (error) { 86 return error; 87 } 88 89 ki2c_select_channel(sc, ch->ch_channel); 90 return 0; 91 } 92 93 static void 94 ki2c_release_bus(void *v, int flags) 95 { 96 struct ki2c_channel *ch = v; 97 struct ki2c_softc *sc = ch->ch_sc; 98 99 iic_release_bus_lock(&sc->sc_mux_lock); 100 } 101 102 static void 103 ki2c_init_channel(struct ki2c_softc *sc, int channel, int node) 104 { 105 struct ki2c_channel *ch = &sc->sc_channels[channel]; 106 107 iic_tag_init(&ch->ch_i2c); 108 ch->ch_i2c.ic_channel = channel; 109 ch->ch_i2c.ic_cookie = ch; 110 ch->ch_i2c.ic_exec = ki2c_i2c_exec; 111 ch->ch_i2c.ic_acquire_bus = ki2c_acquire_bus; 112 ch->ch_i2c.ic_release_bus = ki2c_release_bus; 113 114 ch->ch_sc = sc; 115 ch->ch_node = node; 116 ch->ch_channel = channel; 117 } 118 119 CFATTACH_DECL_NEW(ki2c, sizeof(struct ki2c_softc), ki2c_match, ki2c_attach, 120 NULL, NULL); 121 122 int 123 ki2c_match(device_t parent, cfdata_t match, void *aux) 124 { 125 struct confargs *ca = aux; 126 127 if (strcmp(ca->ca_name, "i2c") == 0) 128 return 1; 129 130 return 0; 131 } 132 133 void 134 ki2c_attach(device_t parent, device_t self, void *aux) 135 { 136 struct ki2c_softc *sc = device_private(self); 137 struct confargs *ca = aux; 138 int node = ca->ca_node, root; 139 uint32_t addr, channel, intr[2]; 140 int rate, child; 141 int intrparent; 142 char name[32], intr_xname[32], model[32]; 143 uint32_t picbase; 144 145 sc->sc_dev = self; 146 sc->sc_tag = ca->ca_tag; 147 ca->ca_reg[0] += ca->ca_baseaddr; 148 149 root = OF_finddevice("/"); 150 model[0] = 0; 151 OF_getprop(root, "model", model, 32); 152 DPRINTF("model %s\n", model); 153 if (OF_getprop(node, "AAPL,i2c-rate", &rate, 4) != 4) { 154 aprint_error(": cannot get i2c-rate\n"); 155 return; 156 } 157 if (OF_getprop(node, "AAPL,address", &addr, 4) != 4) { 158 aprint_error(": unable to find i2c address\n"); 159 return; 160 } 161 if (bus_space_map(sc->sc_tag, addr, PAGE_SIZE, 0, &sc->sc_bh) != 0) { 162 aprint_error_dev(sc->sc_dev, "failed to map registers\n"); 163 return; 164 } 165 166 if (OF_getprop(node, "AAPL,address-step", &sc->sc_regstep, 4) != 4) { 167 aprint_error(": unable to find i2c address step\n"); 168 return; 169 } 170 171 if(OF_getprop(node, "interrupts", intr, 8) != 8) { 172 aprint_error(": can't find interrupt\n"); 173 return; 174 } 175 176 /* 177 * on some G5 we have two openpics, one in mac-io, one in /u3 178 * in order to get interrupts we need to know which one we're 179 * connected to 180 */ 181 sc->sc_poll = 0; 182 183 if(OF_getprop(node, "interrupt-parent", &intrparent, 4) == 4) { 184 uint32_t preg[8]; 185 struct pic_ops *pic; 186 187 sc->sc_poll = 1; 188 if(OF_getprop(intrparent, "reg", preg, 8) > 4) { 189 /* now look for a pic with that base... */ 190 picbase = preg[0]; 191 if ((picbase & 0x80000000) == 0) { 192 /* some OF versions have the openpic's reg as 193 * an offset into mac-io just to be annoying */ 194 int mio = OF_parent(intrparent); 195 if (OF_getprop(mio, "ranges", preg, 20) == 20) 196 picbase += preg[3]; 197 } 198 DPRINTF("PIC base %08x\n", picbase); 199 pic = find_pic_by_cookie((void *)picbase); 200 if (pic != NULL) { 201 sc->sc_poll = 0; 202 intr[0] += pic->pic_intrbase; 203 } 204 } 205 } 206 207 if (sc->sc_poll) { 208 aprint_normal(" polling"); 209 } else aprint_normal(" irq %d", intr[0]); 210 211 printf("\n"); 212 213 ki2c_writereg(sc, STATUS, 0); 214 ki2c_writereg(sc, ISR, 0); 215 ki2c_writereg(sc, IER, 0); 216 217 ki2c_setmode(sc, I2C_STDSUBMODE); 218 ki2c_setspeed(sc, I2C_100kHz); /* XXX rate */ 219 220 ki2c_writereg(sc, IER,I2C_INT_DATA|I2C_INT_ADDR|I2C_INT_STOP); 221 222 /* 223 * Newer OpenFirmware will have "i2c-bus" nodes below the controller 224 * node. If we don't find any, then the devices are direct children 225 * of the controller node, and the channel number is encoded in 226 * bit 8 of the i2c address cell (see ofw_i2c_machdep.c). 227 */ 228 bool found_busnode = false; 229 for (child = OF_child(node); child != 0; child = OF_peer(child)) { 230 OF_getprop(child, "name", name, sizeof(name)); 231 if (strcmp(name, "i2c-bus") == 0) { 232 OF_getprop(child, "reg", &channel, sizeof(channel)); 233 DPRINTF("found channel %x\n", channel); 234 if (channel >= KI2C_MAX_CHANNELS) { 235 aprint_error_dev(self, 236 "ignoring invalid I2C channel %u\n", 237 channel); 238 continue; 239 } 240 ki2c_init_channel(sc, channel, child); 241 found_busnode = true; 242 } 243 } 244 if (!found_busnode) { 245 for (channel = 0; channel < KI2C_MAX_CHANNELS; channel++) { 246 ki2c_init_channel(sc, channel, node); 247 } 248 } 249 250 /* 251 * The Keywest I2C controller has a built-in I2C mux, but it's not 252 * really a distinct device in the device tree, so we handle it here. 253 * 254 * The locking order is: 255 * 256 * iic bus mutex -> mux_lock 257 * 258 * mux_lock is taken in ki2c_acquire_bus(). 259 */ 260 mutex_init(&sc->sc_mux_lock, MUTEX_DEFAULT, IPL_NONE); 261 262 cv_init(&sc->sc_todev, device_xname(self)); 263 mutex_init(&sc->sc_todevmtx, MUTEX_DEFAULT, IPL_NONE); 264 265 if(sc->sc_poll == 0) { 266 snprintf(intr_xname, sizeof(intr_xname), "%s intr", device_xname(self)); 267 intr_establish_xname(intr[0], (intr[1] & 1) ? IST_LEVEL : IST_EDGE, 268 IPL_BIO, ki2c_intr, sc, intr_xname); 269 270 ki2c_writereg(sc, IER, I2C_INT_DATA | I2C_INT_ADDR| I2C_INT_STOP); 271 } 272 273 for (channel = 0; channel < KI2C_MAX_CHANNELS; channel++) { 274 if (sc->sc_channels[channel].ch_node == 0) { 275 continue; 276 } 277 iicbus_attach_with_devhandle(sc->sc_dev, 278 &sc->sc_channels[channel].ch_i2c, 279 devhandle_from_of(device_handle(sc->sc_dev), 280 sc->sc_channels[channel].ch_node)); 281 } 282 } 283 284 uint8_t 285 ki2c_readreg(struct ki2c_softc *sc, int reg) 286 { 287 288 return bus_space_read_1(sc->sc_tag, sc->sc_bh, sc->sc_regstep * reg); 289 } 290 291 void 292 ki2c_writereg(struct ki2c_softc *sc, int reg, uint8_t val) 293 { 294 295 bus_space_write_1(sc->sc_tag, sc->sc_bh, reg * sc->sc_regstep, val); 296 delay(10); 297 } 298 299 u_int 300 ki2c_getmode(struct ki2c_softc *sc) 301 { 302 return ki2c_readreg(sc, MODE) & I2C_MODE; 303 } 304 305 void 306 ki2c_setmode(struct ki2c_softc *sc, u_int mode) 307 { 308 ki2c_writereg(sc, MODE, mode); 309 } 310 311 u_int 312 ki2c_getspeed(struct ki2c_softc *sc) 313 { 314 return ki2c_readreg(sc, MODE) & I2C_SPEED; 315 } 316 317 void 318 ki2c_setspeed(struct ki2c_softc *sc, u_int speed) 319 { 320 u_int x; 321 322 KASSERT((speed & ~I2C_SPEED) == 0); 323 x = ki2c_readreg(sc, MODE); 324 x &= ~I2C_SPEED; 325 x |= speed; 326 ki2c_writereg(sc, MODE, x); 327 } 328 329 int 330 ki2c_intr(void *cookie) 331 { 332 struct ki2c_softc *sc = cookie; 333 u_int isr, x; 334 isr = ki2c_readreg(sc, ISR); 335 if (isr & I2C_INT_ADDR) { 336 #if 0 337 if ((ki2c_readreg(sc, STATUS) & I2C_ST_LASTAAK) == 0) { 338 /* No slave responded. */ 339 sc->sc_flags |= I2C_ERROR; 340 goto out; 341 } 342 #endif 343 344 if (sc->sc_flags & I2C_READING) { 345 if (sc->sc_resid > 1) { 346 x = ki2c_readreg(sc, CONTROL); 347 x |= I2C_CT_AAK; 348 ki2c_writereg(sc, CONTROL, x); 349 } 350 } else { 351 ki2c_writereg(sc, DATA, *sc->sc_data++); 352 sc->sc_resid--; 353 } 354 } 355 356 if (isr & I2C_INT_DATA) { 357 if (sc->sc_flags & I2C_READING) { 358 *sc->sc_data++ = ki2c_readreg(sc, DATA); 359 sc->sc_resid--; 360 361 if (sc->sc_resid == 0) { /* Completed */ 362 ki2c_writereg(sc, CONTROL, 0); 363 goto out; 364 } 365 } else { 366 #if 0 367 if ((ki2c_readreg(sc, STATUS) & I2C_ST_LASTAAK) == 0) { 368 /* No slave responded. */ 369 sc->sc_flags |= I2C_ERROR; 370 goto out; 371 } 372 #endif 373 374 if (sc->sc_resid == 0) { 375 x = ki2c_readreg(sc, CONTROL) | I2C_CT_STOP; 376 ki2c_writereg(sc, CONTROL, x); 377 } else { 378 ki2c_writereg(sc, DATA, *sc->sc_data++); 379 sc->sc_resid--; 380 } 381 } 382 } 383 384 out: 385 if (isr & I2C_INT_STOP) { 386 ki2c_writereg(sc, CONTROL, 0); 387 sc->sc_flags &= ~I2C_BUSY; 388 cv_signal(&sc->sc_todev); 389 } 390 391 ki2c_writereg(sc, ISR, isr); 392 393 return 1; 394 } 395 396 int 397 ki2c_poll(struct ki2c_softc *sc, int timo) 398 { 399 int bail = 0; 400 while (sc->sc_flags & I2C_BUSY) { 401 if ((cold) || (bail > 10) || (sc->sc_poll)) { 402 if (ki2c_readreg(sc, ISR)) 403 ki2c_intr(sc); 404 timo -= 10; 405 if (timo < 0) { 406 DPRINTF("i2c_poll: timeout\n"); 407 return -1; 408 } 409 delay(10); 410 } else { 411 mutex_enter(&sc->sc_todevmtx); 412 cv_timedwait_sig(&sc->sc_todev, &sc->sc_todevmtx, hz/10); 413 mutex_exit(&sc->sc_todevmtx); 414 bail++; 415 } 416 } 417 return 0; 418 } 419 420 int 421 ki2c_start(struct ki2c_softc *sc, int addr, int subaddr, void *data, int len) 422 { 423 int rw = (sc->sc_flags & I2C_READING) ? 1 : 0; 424 int timo, x; 425 426 KASSERT((addr & 1) == 0); 427 428 sc->sc_data = data; 429 sc->sc_resid = len; 430 sc->sc_flags |= I2C_BUSY; 431 432 timo = 1000 + len * 200; 433 434 /* XXX TAS3001 sometimes takes 50ms to finish writing registers. */ 435 /* if (addr == 0x68) */ 436 timo += 100000; 437 438 ki2c_writereg(sc, ADDR, addr | rw); 439 ki2c_writereg(sc, SUBADDR, subaddr); 440 441 x = ki2c_readreg(sc, CONTROL) | I2C_CT_ADDR; 442 ki2c_writereg(sc, CONTROL, x); 443 444 if (ki2c_poll(sc, timo)) 445 return -1; 446 if (sc->sc_flags & I2C_ERROR) { 447 DPRINTF("I2C_ERROR\n"); 448 return -1; 449 } 450 return 0; 451 } 452 453 int 454 ki2c_read(struct ki2c_softc *sc, int addr, int subaddr, void *data, int len) 455 { 456 sc->sc_flags = I2C_READING; 457 DPRINTF("ki2c_read: %02x %d\n", addr, len); 458 return ki2c_start(sc, addr, subaddr, data, len); 459 } 460 461 int 462 ki2c_write(struct ki2c_softc *sc, int addr, int subaddr, void *data, int len) 463 { 464 sc->sc_flags = 0; 465 DPRINTF("ki2c_write: %02x %d\n",addr,len); 466 return ki2c_start(sc, addr, subaddr, data, len); 467 } 468 469 int 470 ki2c_i2c_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, const void *vcmd, 471 size_t cmdlen, void *vbuf, size_t buflen, int flags) 472 { 473 struct ki2c_channel *ch = cookie; 474 struct ki2c_softc *sc = ch->ch_sc; 475 int i; 476 size_t w_len; 477 uint8_t *wp; 478 uint8_t wrbuf[KI2C_EXEC_MAX_CMDLEN + KI2C_EXEC_MAX_CMDLEN]; 479 480 /* 481 * We don't have any idea if the ki2c controller can execute 482 * i2c quick_{read,write} operations, so if someone tries one, 483 * return an error. 484 */ 485 if (cmdlen == 0 && buflen == 0) 486 return -1; 487 488 /* 489 * Transaction could be much larger now. Bail if it exceeds our 490 * small combining buffer, we don't expect such devices. 491 */ 492 if (cmdlen + buflen > sizeof(wrbuf)) 493 return -1; 494 495 addr &= 0x7f; /* KASSERT((addr & ~0x7f) == 0); ??? */ 496 497 ki2c_setspeed(sc, I2C_50kHz); 498 499 /* Write-buffer defaults to vcmd */ 500 wp = (uint8_t *)(__UNCONST(vcmd)); 501 w_len = cmdlen; 502 503 /* 504 * Concatenate vcmd and vbuf for write operations 505 * 506 * Drivers written specifically for ki2c might already do this, 507 * but "generic" i2c drivers still provide separate arguments 508 * for the cmd and buf parts of iic_smbus_write_{byte,word}. 509 */ 510 if (I2C_OP_WRITE_P(op) && buflen != 0) { 511 if (cmdlen == 0) { 512 wp = (uint8_t *)vbuf; 513 w_len = buflen; 514 } else { 515 KASSERT((cmdlen + buflen) <= sizeof(wrbuf)); 516 wp = (uint8_t *)(__UNCONST(vcmd)); 517 w_len = 0; 518 for (i = 0; i < cmdlen; i++) 519 wrbuf[w_len++] = *wp++; 520 wp = (uint8_t *)vbuf; 521 for (i = 0; i < buflen; i++) 522 wrbuf[w_len++] = *wp++; 523 wp = wrbuf; 524 } 525 } 526 527 if (w_len > 0) 528 if (ki2c_write(sc, addr << 1, 0, wp, w_len) !=0 ) 529 return -1; 530 531 if (I2C_OP_READ_P(op)) { 532 if (ki2c_read(sc, addr << 1, 0, vbuf, buflen) !=0 ) 533 return -1; 534 } 535 return 0; 536 } 537