| /src/lib/libc/arch/arm/hardfloat/ |
| fpgetround.c | 63 uint32_t fpscr; local
64 __asm __volatile("vmrs %0, fpscr" : "=r" (fpscr));
65 return __SHIFTOUT(fpscr, VFP_FPSCR_RMODE);
|
| fpsetround.c | 63 uint32_t fpscr; local
64 __asm __volatile("vmrs %0, fpscr" : "=r" (fpscr));
65 fp_rnd old_rnd = __SHIFTOUT(fpscr, VFP_FPSCR_RMODE);
66 fpscr ^= __SHIFTIN(new_rnd ^ old_rnd, VFP_FPSCR_RMODE);
67 __asm __volatile("vmsr fpscr, %0" :: "r" (fpscr));
|
| /src/lib/libc/arch/powerpc64/gen/ |
| fpgetmask.c | 53 uint64_t fpscr; local
55 __asm volatile("mffs %0" : "=f"(fpscr));
56 return (((uint32_t)fpscr & MASKBITS) >> MASKSHFT);
|
| fpgetround.c | 53 uint64_t fpscr; local
55 __asm volatile("mffs %0" : "=f"(fpscr));
56 return (((uint32_t)fpscr & ROUNDBITS) >> ROUNDSHFT);
|
| fpgetsticky.c | 53 uint64_t fpscr; local
55 __asm volatile("mffs %0" : "=f"(fpscr));
56 return (((uint32_t)fpscr & STICKYBITS) >> STICKYSHFT);
|
| fpsetround.c | 52 uint64_t fpscr; local
55 __asm volatile("mffs %0" : "=f"(fpscr));
56 old = (uint32_t)fpscr & ROUNDBITS;
57 fpscr &= ~ROUNDBITS;
58 fpscr |= rnd_dir & ROUNDBITS;
59 __asm volatile("mtfsf 0xff,%0" :: "f"(fpscr));
|
| fpsetmask.c | 53 uint64_t fpscr; local
56 __asm volatile("mffs %0" : "=f"(fpscr));
57 old = ((uint32_t)fpscr & MASKBITS) >> MASKSHFT;
58 fpscr &= ~MASKBITS;
59 fpscr |= ((uint32_t)mask << MASKSHFT) & MASKBITS;
60 __asm volatile("mtfsf 0xff,%0" :: "f"(fpscr));
|
| fpsetsticky.c | 56 uint64_t fpscr; local
59 __asm volatile("mffs %0" : "=f"(fpscr));
60 old = ((uint32_t)fpscr & STICKYBITS) >> STICKYSHFT;
67 fpscr &= ~INVBITS;
69 fpscr |= INVBITS;
70 fpscr &= ~STICKYBITS;
71 fpscr |= ((uint32_t)mask << STICKYSHFT) & STICKYBITS;
75 if (fpscr & (STICKYBITS|INVBITS))
76 fpscr |= FPSCR_FX;
78 fpscr &= ~FPSCR_FX
[all...] |
| /src/lib/libm/arch/arm/ |
| fenv.c | 109 int fpscr = armreg_fpscr_read(); local
110 fpscr |= __SHIFTIN(excepts, VFP_FPSCR_CSUM);
111 armreg_fpscr_write(fpscr);
130 int fpscr = armreg_fpscr_read(); local
131 fpscr &= ~__SHIFTIN(excepts, VFP_FPSCR_CSUM);
132 fpscr |= __SHIFTIN((*flagp & excepts), VFP_FPSCR_CSUM);
133 armreg_fpscr_write(fpscr);
143 int fpscr = armreg_fpscr_read(); local
144 armreg_fpscr_write(fpscr | __SHIFTIN((excepts), VFP_FPSCR_ESUM));
145 return __SHIFTOUT(fpscr, VFP_FPSCR_ESUM) & FE_ALL_EXCEPT
154 int fpscr = armreg_fpscr_read(); local
197 int fpscr = armreg_fpscr_read() & ~VFP_FPSCR_RMODE; local
256 int fpscr = armreg_fpscr_read(); local
[all...] |
| /src/sys/arch/powerpc/include/ |
| reg.h | 63 uint64_t fpscr; /* Status and Control Register */ member in struct:fpreg
66 double fpscr; /* Status and Control Register */
|
| /src/sys/arch/powerpc/powerpc/ |
| fpu.c | 138 uint32_t fpscr, ofpscr; local
158 "mffs 0\n" /* get FPSCR */
166 "mffs 0\n" /* get FPSCR */
167 "stfd 0,0(%[fpscr])\n" /* store it */
170 [fpscr] "b"(&pcb->pcb_fpu.fpscr),
180 fpscr64 = *(uint64_t *)&pcb->pcb_fpu.fpscr;
181 ((uint32_t *)&pcb->pcb_fpu.fpscr)[_QUAD_LOWWORD] &= ~MASKBITS;
186 fpscr64 = *(uint64_t *)&pcb->pcb_fpu.fpscr;
187 ((uint32_t *)&pcb->pcb_fpu.fpscr)[_QUAD_LOWWORD] &= ~MASKBITS
[all...] |
| /src/sys/arch/powerpc/fpu/ |
| fpu_implode.c | 513 bool fpscr; local
522 fpscr = type & FTYPE_FPSCR;
556 if (fpscr) {
|
| /src/sys/compat/linux32/arch/aarch64/ |
| linux32_machdep.h | 65 uint32_t fpscr; member in struct:linux32_user_vfp
|
| /src/external/gpl3/gdb/dist/sim/sh/ |
| sh-sim.h | 45 int fpscr; /* dsr for sh-dsp */ member in struct:__anon19969::__anon19970::__anon19971::__anon19972
|
| /src/external/gpl3/gdb.old/dist/sim/sh/ |
| sh-sim.h | 45 int fpscr; /* dsr for sh-dsp */ member in struct:__anon22708::__anon22709::__anon22710::__anon22711
|
| /src/external/gpl3/gcc/dist/libgcc/config/rs6000/ |
| darwin-fallback.c | 267 uint32_t fpscr; member in struct:gcc_float_vector_state
457 set_offset (R_SPEFSCR, &float_vector_state->fpscr);
|
| linux-unwind.h | 73 unsigned int fpscr; member in struct:gcc_regs
|
| /src/external/gpl3/gcc.old/dist/libgcc/config/rs6000/ |
| darwin-fallback.c | 267 uint32_t fpscr; member in struct:gcc_float_vector_state
457 set_offset (R_SPEFSCR, &float_vector_state->fpscr);
|
| linux-unwind.h | 73 unsigned int fpscr; member in struct:gcc_regs
|
| /src/crypto/external/apache2/openssl/dist/crypto/poly1305/ |
| poly1305_ieee754.c | 140 double fpscr_orig, fpscr = *(double *)&one;
143 asm volatile("mtfsf 255,%0" ::"f"(fpscr));
255 double fpscr_orig, fpscr = *(double *)&one; local
258 asm volatile("mtfsf 255,%0" ::"f"(fpscr));
|
| /src/crypto/external/bsd/openssl/dist/crypto/poly1305/ |
| poly1305_ieee754.c | 138 double fpscr_orig, fpscr = *(double *)&one;
141 asm volatile ("mtfsf 255,%0"::"f"(fpscr));
260 double fpscr_orig, fpscr = *(double *)&one; local
263 asm volatile ("mtfsf 255,%0"::"f"(fpscr));
|
| /src/crypto/external/bsd/openssl.old/dist/crypto/poly1305/ |
| poly1305_ieee754.c | 138 double fpscr_orig, fpscr = *(double *)&one;
141 asm volatile ("mtfsf 255,%0"::"f"(fpscr));
260 double fpscr_orig, fpscr = *(double *)&one; local
263 asm volatile ("mtfsf 255,%0"::"f"(fpscr));
|
| /src/external/gpl3/gdb/dist/gdb/ |
| sh-tdep.c | 150 "fpul", "fpscr",
169 "fpul", "fpscr",
188 "fpul", "fpscr",
300 "fpul", "fpscr",
504 struct sh_frame_cache *cache, ULONGEST fpscr)
611 if (fpscr & FPSCR_SZ)
1875 ULONGEST fpscr; local
1877 /* Check for the existence of the FPSCR register. If it exists,
1880 there's no FPSCR register. */
1882 fpscr = get_frame_register_unsigned (this_frame, FPSCR_REGNUM)
[all...] |
| /src/external/gpl3/gdb.old/dist/gdb/ |
| sh-tdep.c | 150 "fpul", "fpscr",
169 "fpul", "fpscr",
188 "fpul", "fpscr",
300 "fpul", "fpscr",
504 struct sh_frame_cache *cache, ULONGEST fpscr)
611 if (fpscr & FPSCR_SZ)
1875 ULONGEST fpscr; local
1877 /* Check for the existence of the FPSCR register. If it exists,
1880 there's no FPSCR register. */
1882 fpscr = get_frame_register_unsigned (this_frame, FPSCR_REGNUM)
[all...] |
| /src/external/gpl3/gdb/dist/sim/ppc/ |
| registers.h | 267 fpscreg fpscr; member in struct:_registers
345 #define FPSCR cpu_registers(processor)->fpscr
|
