1 /* $NetBSD: if_gem_pci.c,v 1.55 2025/02/15 09:07:14 hannken Exp $ */ 2 3 /* 4 * 5 * Copyright (C) 2001 Eduardo Horvath. 6 * All rights reserved. 7 * 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 */ 31 32 /* 33 * PCI bindings for Apple GMAC, Sun ERI and Sun GEM Ethernet controllers 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: if_gem_pci.c,v 1.55 2025/02/15 09:07:14 hannken Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/socket.h> 43 #include <sys/errno.h> 44 #include <sys/device.h> 45 #include <sys/kmem.h> 46 47 #include <machine/endian.h> 48 49 #include <net/if.h> 50 #include <net/if_dl.h> 51 #include <net/if_media.h> 52 #include <net/if_ether.h> 53 54 #include <net/bpf.h> 55 56 #include <sys/bus.h> 57 #include <sys/intr.h> 58 59 #include <dev/mii/mii.h> 60 #include <dev/mii/miivar.h> 61 #include <dev/mii/mii_bitbang.h> 62 63 #include <dev/ic/gemreg.h> 64 #include <dev/ic/gemvar.h> 65 66 #include <dev/pci/pcivar.h> 67 #include <dev/pci/pcireg.h> 68 #include <dev/pci/pcidevs.h> 69 #include <prop/proplib.h> 70 71 struct gem_pci_softc { 72 struct gem_softc gsc_gem; /* GEM device */ 73 void *gsc_ih; 74 pci_chipset_tag_t gsc_pc; 75 pci_intr_handle_t gsc_handle; 76 }; 77 78 static bool gem_pci_estintr(struct gem_pci_softc *); 79 static bool gem_pci_suspend(device_t, const pmf_qual_t *); 80 static bool gem_pci_resume(device_t, const pmf_qual_t *); 81 static int gem_pci_detach(device_t, int); 82 83 int gem_pci_match(device_t, cfdata_t, void *); 84 void gem_pci_attach(device_t, device_t, void *); 85 86 CFATTACH_DECL3_NEW(gem_pci, sizeof(struct gem_pci_softc), 87 gem_pci_match, gem_pci_attach, gem_pci_detach, NULL, NULL, NULL, 88 DVF_DETACH_SHUTDOWN); 89 90 /* 91 * Attach routines need to be split out to different bus-specific files. 92 */ 93 94 int 95 gem_pci_match(device_t parent, cfdata_t cf, void *aux) 96 { 97 struct pci_attach_args *pa = aux; 98 99 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN && 100 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_ERINETWORK || 101 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_GEMNETWORK)) 102 return (1); 103 104 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE && 105 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC || 106 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC2 || 107 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC3 || 108 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_SHASTA_GMAC || 109 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_K2_GMAC || 110 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_SHASTA_GMAC || 111 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_INTREPID2_GMAC)) 112 return (1); 113 114 115 return (0); 116 } 117 118 static inline int 119 gempromvalid(u_int8_t* buf) 120 { 121 return buf[0] == 0x18 && buf[1] == 0x00 && /* structure length */ 122 buf[2] == 0x00 && /* revision */ 123 (buf[3] == 0x00 || /* hme */ 124 buf[3] == 0x80) && /* qfe */ 125 buf[4] == PCI_SUBCLASS_NETWORK_ETHERNET && /* subclass code */ 126 buf[5] == PCI_CLASS_NETWORK; /* class code */ 127 } 128 129 static inline int 130 isshared_pins(u_int8_t* buf) 131 { 132 return buf[0] == 's' && buf[1] == 'h' && buf[2] == 'a' && 133 buf[3] == 'r' && buf[4] == 'e' && buf[5] == 'd' && 134 buf[6] == '-' && buf[7] == 'p' && buf[8] == 'i' && 135 buf[9] == 'n' && buf[10] == 's'; 136 } 137 138 static inline int 139 isserdes(u_int8_t* buf) 140 { 141 return buf[0] == 's' && buf[1] == 'e' && buf[2] == 'r' && 142 buf[3] == 'd' && buf[4] == 'e' && buf[5] == 's'; 143 } 144 145 #define GEM_TMP_BUFSIZE 0x0800 146 147 void 148 gem_pci_attach(device_t parent, device_t self, void *aux) 149 { 150 struct pci_attach_args *pa = aux; 151 struct gem_pci_softc *gsc = device_private(self); 152 struct gem_softc *sc = &gsc->gsc_gem; 153 prop_data_t data; 154 uint8_t enaddr[ETHER_ADDR_LEN]; 155 bus_space_handle_t romh; 156 uint8_t *buf; 157 int dataoff, vpdoff, serdes; 158 int i, got_addr = 0; 159 #ifdef GEM_DEBUG 160 int j; 161 #endif 162 struct pci_vpd *vpd; 163 static const u_int8_t promhdr[] = { 0x55, 0xaa }; 164 #define PROMHDR_PTR_DATA 0x18 165 static const u_int8_t promdat[] = { 166 0x50, 0x43, 0x49, 0x52, /* "PCIR" */ 167 PCI_VENDOR_SUN & 0xff, PCI_VENDOR_SUN >> 8, 168 PCI_PRODUCT_SUN_GEMNETWORK & 0xff, 169 PCI_PRODUCT_SUN_GEMNETWORK >> 8 170 }; 171 #define PROMDATA_PTR_VPD 0x08 172 #define PROMDATA_DATA2 0x0a 173 174 pci_aprint_devinfo(pa, "Ethernet controller"); 175 176 sc->sc_dev = self; 177 sc->sc_chiprev = PCI_REVISION(pa->pa_class); 178 179 /* 180 * Some Sun GEMs/ERIs do have their intpin register bogusly set to 0, 181 * although it should be 1. correct that. 182 */ 183 if (pa->pa_intrpin == 0) 184 pa->pa_intrpin = 1; 185 186 sc->sc_variant = GEM_UNKNOWN; 187 188 if (pci_dma64_available(pa)) 189 sc->sc_dmatag = pa->pa_dmat64; 190 else 191 sc->sc_dmatag = pa->pa_dmat; 192 193 sc->sc_flags |= GEM_PCI; 194 195 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN) { 196 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_GEMNETWORK) 197 sc->sc_variant = GEM_SUN_GEM; 198 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_ERINETWORK) 199 sc->sc_variant = GEM_SUN_ERI; 200 } else if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE) { 201 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC || 202 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC2 || 203 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC3 || 204 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_SHASTA_GMAC || 205 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_INTREPID2_GMAC) 206 sc->sc_variant = GEM_APPLE_GMAC; 207 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_K2_GMAC) 208 sc->sc_variant = GEM_APPLE_K2_GMAC; 209 } 210 211 if (sc->sc_variant == GEM_UNKNOWN) { 212 aprint_error_dev(sc->sc_dev, "unknown adaptor\n"); 213 return; 214 } 215 216 #define PCI_GEM_BASEADDR (PCI_MAPREG_START + 0x00) 217 218 /* XXX Need to check for a 64-bit mem BAR? */ 219 if (pci_mapreg_map(pa, PCI_GEM_BASEADDR, 220 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, 221 &sc->sc_bustag, &sc->sc_h1, NULL, &sc->sc_size) != 0) 222 { 223 aprint_error_dev(sc->sc_dev, 224 "unable to map device registers\n"); 225 return; 226 } 227 if (bus_space_subregion(sc->sc_bustag, sc->sc_h1, 228 GEM_PCI_BANK2_OFFSET, GEM_PCI_BANK2_SIZE, &sc->sc_h2)) { 229 aprint_error_dev(sc->sc_dev, 230 "unable to create bank 2 subregion\n"); 231 return; 232 } 233 234 buf = kmem_alloc(GEM_TMP_BUFSIZE, KM_SLEEP); 235 236 if ((data = prop_dictionary_get(device_properties(sc->sc_dev), 237 "mac-address")) != NULL) { 238 memcpy(enaddr, prop_data_value(data), ETHER_ADDR_LEN); 239 got_addr = 1; 240 if ((data = prop_dictionary_get(device_properties(sc->sc_dev), 241 "shared-pins")) != NULL) { 242 memcpy(buf, prop_data_value(data), 243 prop_data_size(data)); 244 if (isserdes(buf)) { 245 sc->sc_flags |= GEM_SERDES; 246 } 247 } 248 } else { 249 /* 250 * Dig out VPD (vital product data) and acquire Ethernet 251 * address. The VPD of gem resides in the PCI PROM (PCI FCode). 252 */ 253 /* 254 * ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and 255 * later) chapter 2 describes the data structure. 256 */ 257 258 uint8_t *enp = NULL; 259 260 if (sc->sc_variant == GEM_SUN_GEM && 261 (bus_space_subregion(sc->sc_bustag, sc->sc_h1, 262 GEM_PCI_ROM_OFFSET, GEM_PCI_ROM_SIZE, &romh)) == 0) { 263 264 /* read PCI Expansion PROM Header */ 265 bus_space_read_region_1(sc->sc_bustag, 266 romh, 0, buf, GEM_TMP_BUFSIZE); 267 268 /* Check for "shared-pins = serdes" in FCode. */ 269 i = 0; 270 serdes = 0; 271 while (i < GEM_TMP_BUFSIZE - sizeof "serdes") { 272 if (!serdes) { 273 if (isserdes(&buf[i])) 274 serdes = 1; 275 } else { 276 if (isshared_pins(&buf[i])) 277 serdes = 2; 278 } 279 if (serdes == 2) { 280 sc->sc_flags |= GEM_SERDES; 281 break; 282 } 283 i++; 284 } 285 #ifdef GEM_DEBUG 286 /* PROM dump */ 287 printf("%s: PROM dump (0x0000 to %04x)\n", 288 device_xname(sc->sc_dev), GEM_TMP_BUFSIZE - 1); 289 i = 0; 290 j = 0; 291 printf(" %04x ", i); 292 while (i < GEM_TMP_BUFSIZE ) { 293 printf("%02x ", buf[i]); 294 if (i && !(i % 8)) 295 printf(" "); 296 if (i && !(i % 16)) { 297 printf(" "); 298 while (j < i) { 299 if (buf[j] > 31 && buf[j] < 128) 300 printf("%c", buf[j]); 301 else 302 printf("."); 303 j++; 304 } 305 j = i; 306 printf("\n %04x ", i); 307 } 308 i++; 309 } 310 printf("\n"); 311 #endif 312 313 if (memcmp(buf, promhdr, sizeof promhdr) == 0 && 314 (dataoff = (buf[PROMHDR_PTR_DATA] | 315 (buf[PROMHDR_PTR_DATA + 1] << 8))) >= 0x1c) { 316 317 /* read PCI Expansion PROM Data */ 318 bus_space_read_region_1(sc->sc_bustag, romh, 319 dataoff, buf, 64); 320 if (memcmp(buf, promdat, sizeof promdat) == 0 && 321 gempromvalid(buf + PROMDATA_DATA2) && 322 (vpdoff = (buf[PROMDATA_PTR_VPD] | 323 (buf[PROMDATA_PTR_VPD + 1] << 8))) >= 0x1c) { 324 325 /* 326 * The VPD of gem is not in PCI 2.2 327 * standard format. The length in the 328 * resource header is in big endian, 329 * and resources are not properly 330 * terminated (only one resource and no 331 * end tag). 332 */ 333 /* read PCI VPD */ 334 bus_space_read_region_1(sc->sc_bustag, 335 romh, vpdoff, buf, 64); 336 vpd = (void *)(buf + 3); 337 if (PCI_VPDRES_ISLARGE(buf[0]) && 338 PCI_VPDRES_LARGE_NAME(buf[0]) 339 == PCI_VPDRES_TYPE_VPD && 340 vpd->vpd_key0 == 0x4e /* N */ && 341 vpd->vpd_key1 == 0x41 /* A */ && 342 vpd->vpd_len == ETHER_ADDR_LEN) { 343 /* 344 * Ethernet address found 345 */ 346 enp = buf + 6; 347 } 348 } 349 } 350 } 351 352 if (enp) { 353 memcpy(enaddr, enp, ETHER_ADDR_LEN); 354 got_addr = 1; 355 } 356 } 357 358 kmem_free(buf, GEM_TMP_BUFSIZE); 359 360 if (!got_addr) { 361 printf("%s: no Ethernet address found\n", 362 device_xname(sc->sc_dev)); 363 /* should we bail here? */ 364 } 365 366 if (pci_intr_map(pa, &gsc->gsc_handle) != 0) { 367 aprint_error_dev(sc->sc_dev, "unable to map interrupt\n"); 368 return; 369 } 370 gsc->gsc_pc = pa->pa_pc; 371 gem_pci_estintr(gsc); 372 373 /* Finish off the attach. */ 374 gem_attach(sc, enaddr); 375 376 if (pmf_device_register1(sc->sc_dev, 377 gem_pci_suspend, gem_pci_resume, gem_shutdown)) 378 pmf_class_network_register(sc->sc_dev, &sc->sc_ethercom.ec_if); 379 else 380 aprint_error_dev(sc->sc_dev, 381 "could not establish power handlers\n"); 382 } 383 384 static bool 385 gem_pci_suspend(device_t self, const pmf_qual_t *qual) 386 { 387 struct gem_pci_softc *gsc = device_private(self); 388 389 if (gsc->gsc_ih != NULL) { 390 pci_intr_disestablish(gsc->gsc_pc, gsc->gsc_ih); 391 gsc->gsc_ih = NULL; 392 } 393 394 return true; 395 } 396 397 static bool 398 gem_pci_estintr(struct gem_pci_softc *gsc) 399 { 400 struct gem_softc *sc = &gsc->gsc_gem; 401 const char *intrstr; 402 char intrbuf[PCI_INTRSTR_LEN]; 403 404 intrstr = pci_intr_string(gsc->gsc_pc, gsc->gsc_handle, intrbuf, 405 sizeof(intrbuf)); 406 gsc->gsc_ih = pci_intr_establish_xname(gsc->gsc_pc, gsc->gsc_handle, 407 IPL_NET, gem_intr, sc, device_xname(sc->sc_dev)); 408 if (gsc->gsc_ih == NULL) { 409 aprint_error_dev(sc->sc_dev, "unable to establish interrupt"); 410 if (intrstr != NULL) 411 aprint_error(" at %s", intrstr); 412 aprint_error("\n"); 413 return false; 414 } 415 aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr); 416 return true; 417 } 418 419 static bool 420 gem_pci_resume(device_t self, const pmf_qual_t *qual) 421 { 422 struct gem_pci_softc *gsc = device_private(self); 423 424 return gem_pci_estintr(gsc); 425 } 426 427 static int 428 gem_pci_detach(device_t self, int flags) 429 { 430 int rc; 431 struct gem_pci_softc *gsc = device_private(self); 432 struct gem_softc *sc = &gsc->gsc_gem; 433 434 switch (sc->sc_att_stage) { 435 case GEM_ATT_BACKEND_2: 436 pmf_device_deregister(self); 437 sc->sc_att_stage = GEM_ATT_FINISHED; 438 /*FALLTHROUGH*/ 439 default: 440 if ((rc = gem_detach(sc, flags)) != 0) 441 return rc; 442 /*FALLTHROUGH*/ 443 case GEM_ATT_BACKEND_1: 444 if (gsc->gsc_ih != NULL) 445 pci_intr_disestablish(gsc->gsc_pc, gsc->gsc_ih); 446 447 bus_space_unmap(sc->sc_bustag, sc->sc_h1, sc->sc_size); 448 /*FALLTHROUGH*/ 449 case GEM_ATT_BACKEND_0: 450 sc->sc_att_stage = GEM_ATT_BACKEND_0; 451 break; 452 } 453 return 0; 454 } 455
Indexes created Thu Sep 25 16:09:42 GMT 2025