1 /* $NetBSD: vpci.c,v 1.17 2026/09/12 20:49:21 palle Exp $ */ 2 /* 3 * Copyright (c) 2015 Palle Lyckegaard 4 * All rights reserved. 5 * 6 * Driver for virtual PCIe host bridge on sun4v systems. 7 * 8 * Based on NetBSD pyro and OpenBSD vpci drivers. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 22 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 27 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 28 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: vpci.c,v 1.17 2026/09/12 20:49:21 palle Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/device.h> 37 #include <sys/errno.h> 38 #include <sys/malloc.h> 39 #include <sys/kmem.h> 40 #include <sys/systm.h> 41 42 #define _SPARC_BUS_DMA_PRIVATE 43 #include <sys/bus.h> 44 #include <machine/autoconf.h> 45 46 #ifdef DDB 47 #include <machine/db_machdep.h> 48 #endif 49 50 #include <dev/pci/pcivar.h> 51 #include <dev/pci/pcireg.h> 52 53 #include <sparc64/dev/iommureg.h> 54 #include <sparc64/dev/iommuvar.h> 55 #include <sparc64/dev/vpcivar.h> 56 57 #include <machine/hypervisor.h> 58 59 #ifdef DEBUG 60 #define VDB_PROM 0x01 61 #define VDB_BUSMAP 0x02 62 #define VDB_INTR 0x04 63 #define VDB_CONF_READ 0x08 64 #define VDB_CONF_WRITE 0x10 65 #define VDB_CONF VDB_CONF_READ|VDB_CONF_WRITE 66 int vpci_debug = 0x00; 67 #define DPRINTF(l, s) do { if (vpci_debug & l) printf s; } while (0) 68 #else 69 #define DPRINTF(l, s) 70 #endif 71 72 #if 0 73 FIXME 74 #define FIRE_RESET_GEN 0x7010 75 76 #define FIRE_RESET_GEN_XIR 0x0000000000000002L 77 78 #define FIRE_INTRMAP_INT_CNTRL_NUM_MASK 0x000003c0 79 #define FIRE_INTRMAP_INT_CNTRL_NUM0 0x00000040 80 #define FIRE_INTRMAP_INT_CNTRL_NUM1 0x00000080 81 #define FIRE_INTRMAP_INT_CNTRL_NUM2 0x00000100 82 #define FIRE_INTRMAP_INT_CNTRL_NUM3 0x00000200 83 #define FIRE_INTRMAP_T_JPID_SHIFT 26 84 #define FIRE_INTRMAP_T_JPID_MASK 0x7c000000 85 86 #define OBERON_INTRMAP_T_DESTID_SHIFT 21 87 #define OBERON_INTRMAP_T_DESTID_MASK 0x7fe00000 88 #endif 89 90 extern struct sparc_pci_chipset _sparc_pci_chipset; 91 92 int vpci_match(device_t, cfdata_t, void *); 93 void vpci_attach(device_t, device_t, void *); 94 int vpci_print(void *, const char *); 95 96 CFATTACH_DECL_NEW(vpci, sizeof(struct vpci_softc), 97 vpci_match, vpci_attach, NULL, NULL); 98 99 void vpci_init(struct vpci_softc */*FIXME, int*/, struct mainbus_attach_args *); 100 void vpci_init_iommu(struct vpci_softc *, struct vpci_pbm *); 101 pci_chipset_tag_t vpci_alloc_chipset(struct vpci_pbm *, int, 102 pci_chipset_tag_t); 103 bus_space_tag_t vpci_alloc_mem_tag(struct vpci_pbm *); 104 bus_space_tag_t vpci_alloc_io_tag(struct vpci_pbm *); 105 bus_space_tag_t vpci_alloc_config_tag(struct vpci_pbm *); 106 bus_space_tag_t vpci_alloc_bus_tag(struct vpci_pbm *, const char *, int); 107 bus_dma_tag_t vpci_alloc_dma_tag(struct vpci_pbm *); 108 109 #if 0 110 int vpci_conf_size(pci_chipset_tag_t, pcitag_t); 111 #endif 112 pcireg_t vpci_conf_read(pci_chipset_tag_t, pcitag_t, int); 113 void vpci_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t); 114 115 static void * vpci_pci_intr_establish(pci_chipset_tag_t pc, 116 pci_intr_handle_t ih, int level, 117 int (*func)(void *), void *arg); 118 void vpci_intr_ack(struct intrhand *); 119 int vpci_intr_map(const struct pci_attach_args *, pci_intr_handle_t *); 120 int vpci_bus_map(bus_space_tag_t, bus_addr_t, 121 bus_size_t, int, vaddr_t, bus_space_handle_t *); 122 paddr_t vpci_bus_mmap(bus_space_tag_t, bus_addr_t, off_t, 123 int, int); 124 void *vpci_intr_establish(bus_space_tag_t, int, int, 125 int (*)(void *), void *, void (*)(void)); 126 127 int vpci_dmamap_create(bus_dma_tag_t, bus_size_t, int, 128 bus_size_t, bus_size_t, int, bus_dmamap_t *); 129 130 int 131 vpci_match(device_t parent, cfdata_t match, void *aux) 132 { 133 struct mainbus_attach_args *ma = aux; 134 char compat[32]; 135 136 if (strcmp(ma->ma_name, "pci") != 0) 137 return (0); 138 139 if (OF_getprop(ma->ma_node, "compatible", compat, sizeof(compat)) == -1) 140 return (0); 141 142 if (strcmp(compat, "SUNW,sun4v-pci") == 0) 143 return (1); 144 145 return (0); 146 } 147 148 void 149 vpci_attach(device_t parent, device_t self, void *aux) 150 { 151 struct vpci_softc *sc = device_private(self); 152 struct mainbus_attach_args *ma = aux; 153 #if 0 154 FIXME 155 char *str; 156 int busa; 157 #endif 158 sc->sc_dev = self; 159 sc->sc_node = ma->ma_node; 160 sc->sc_dmat = ma->ma_dmatag; 161 sc->sc_bustag = ma->ma_bustag; 162 sc->sc_csr = ma->ma_reg[0].ur_paddr; 163 sc->sc_devhandle = (ma->ma_reg[0].ur_paddr >> 32) & 0x0fffffff; 164 #if 0 165 FIXME 166 sc->sc_xbc = ma->ma_reg[1].ur_paddr; 167 sc->sc_ign = INTIGN(ma->ma_upaid << INTMAP_IGN_SHIFT); 168 169 if ((ma->ma_reg[0].ur_paddr & 0x00700000) == 0x00600000) 170 busa = 1; 171 else 172 busa = 0; 173 #endif 174 #if 0 175 FIXME 176 if (bus_space_map(sc->sc_bustag, sc->sc_csr, 177 ma->ma_reg[0].ur_len, BUS_SPACE_MAP_LINEAR, &sc->sc_csrh)) { 178 printf(": failed to map csr registers\n"); 179 return; 180 } 181 #endif 182 #if 0 183 FIXME 184 if (bus_space_map(sc->sc_bustag, sc->sc_xbc, 185 ma->ma_reg[1].ur_len, 0, &sc->sc_xbch)) { 186 printf(": failed to map xbc registers\n"); 187 return; 188 } 189 190 str = prom_getpropstring(ma->ma_node, "compatible"); 191 if (strcmp(str, "pciex108e,80f8") == 0) 192 sc->sc_oberon = 1; 193 194 #endif 195 vpci_init(sc/*FIXME, busa*/, ma); 196 } 197 198 void 199 vpci_init(struct vpci_softc *sc/*FIXME, int busa*/, struct mainbus_attach_args *ma) 200 { 201 struct vpci_pbm *pbm; 202 struct pcibus_attach_args pba; 203 int *busranges = NULL, nranges; 204 205 pbm = kmem_zalloc(sizeof(*pbm), KM_SLEEP); 206 pbm->vp_sc = sc; 207 pbm->vp_devhandle = (ma->ma_reg[0].ur_paddr >> 32) & 0x0fffffff; 208 #if 0 209 FiXME 210 pbm->vp_bus_a = busa; 211 #endif 212 213 if (prom_getprop(sc->sc_node, "ranges", sizeof(struct vpci_range), 214 &pbm->vp_nrange, (void **)&pbm->vp_range)) 215 panic("vpci: can't get ranges"); 216 for (int range = 0; range < pbm->vp_nrange; range++) 217 DPRINTF(VDB_PROM, 218 ("\nvpci_attach: range %d cspace %08x " 219 "child_hi %08x child_lo %08x phys_hi %08x phys_lo %08x " 220 "size_hi %08x size_lo %08x", range, 221 pbm->vp_range[range].cspace, 222 pbm->vp_range[range].child_hi, 223 pbm->vp_range[range].child_lo, 224 pbm->vp_range[range].phys_hi, 225 pbm->vp_range[range].phys_lo, 226 pbm->vp_range[range].size_hi, 227 pbm->vp_range[range].size_lo)); 228 229 if (prom_getprop(sc->sc_node, "bus-range", sizeof(int), &nranges, 230 (void **)&busranges)) 231 panic("vpci: can't get bus-range"); 232 for (int range = 0; range < nranges; range++) 233 DPRINTF(VDB_PROM, ("\nvpci_attach: bus-range %d %08x", range, busranges[range])); 234 235 aprint_normal(": bus %d to %d", busranges[0], busranges[1]); 236 237 vpci_init_iommu(sc, pbm); 238 239 pbm->vp_memt = vpci_alloc_mem_tag(pbm); 240 pbm->vp_iot = vpci_alloc_io_tag(pbm); 241 pbm->vp_cfgt = vpci_alloc_config_tag(pbm); 242 pbm->vp_dmat = vpci_alloc_dma_tag(pbm); 243 pbm->vp_flags = (pbm->vp_memt ? PCI_FLAGS_MEM_OKAY : 0) | 244 (pbm->vp_iot ? PCI_FLAGS_IO_OKAY : 0); 245 #if 0 246 FIXME 247 if (bus_space_map(pbm->vp_cfgt, 0, 0x10000000, 0, &pbm->vp_cfgh)) 248 panic("vpci: can't map config space"); 249 #endif 250 pbm->vp_pc = vpci_alloc_chipset(pbm, sc->sc_node, &_sparc_pci_chipset); 251 pbm->vp_pc->spc_busmax = busranges[1]; 252 pbm->vp_pc->spc_busnode = kmem_zalloc(sizeof(*pbm->vp_pc->spc_busnode), 253 KM_SLEEP); 254 255 #if 0 256 pbm->vp_pc->bustag = pbm->vp_cfgt; 257 pbm->vp_pc->bushandle = pbm->vp_cfgh; 258 #endif 259 260 bzero(&pba, sizeof(pba)); 261 pba.pba_bus = busranges[0]; 262 pba.pba_pc = pbm->vp_pc; 263 pba.pba_flags = pbm->vp_flags; 264 pba.pba_dmat = pbm->vp_dmat; 265 pba.pba_dmat64 = NULL; /* XXX */ 266 pba.pba_memt = pbm->vp_memt; 267 pba.pba_iot = pbm->vp_iot; 268 269 free(busranges, M_DEVBUF); 270 271 config_found(sc->sc_dev, &pba, vpci_print, 272 CFARGS(.devhandle = device_handle(sc->sc_dev))); 273 } 274 275 void 276 vpci_init_iommu(struct vpci_softc *sc, struct vpci_pbm *pbm) 277 { 278 struct iommu_state *is = &pbm->vp_is; 279 int *vdma = NULL; 280 int nitem; 281 int tsbsize = 0; 282 u_int32_t iobase = -1; 283 u_int32_t iolen = 0; 284 char *name; 285 286 pbm->vp_sb.sb_is = is; 287 is->is_bustag = sc->sc_bustag; 288 289 if (bus_space_subregion(is->is_bustag, sc->sc_csrh, 290 0x40000, 0x100, &is->is_iommu)) { 291 panic("vpci: unable to create iommu handle"); 292 } 293 294 /* Construct tsbsize */ 295 if (!prom_getprop(sc->sc_node, "virtual-dma", sizeof(vdma), &nitem, 296 (void **)&vdma)) { 297 DPRINTF(VDB_BUSMAP, ("vpci_init_iommu: vdma[0]=0x%x vdma[1]=0x%x\n", 298 vdma[0], vdma[1])); 299 iobase = vdma[0]; 300 iolen = vdma[1]; 301 for (tsbsize = 8; (1 << (tsbsize+23)) > iolen;) 302 tsbsize--; 303 DPRINTF(VDB_BUSMAP, ("vpci_init_iommu: iobase=0x%x iolen = 0x%x tsbsize=0x%x\n", 304 iobase, iolen, tsbsize)); 305 free(vdma, M_DEVBUF); 306 } else 307 panic("vpci_init_iommu: getprop virtual-dma failed"); 308 309 aprint_normal(" vdma %x length %x\n", iobase, iolen); 310 aprint_naive("\n"); 311 312 /* We have no STC. */ 313 is->is_sb[0] = NULL; 314 315 name = kmem_asprintf("%s dvma", device_xname(sc->sc_dev)); 316 317 /* Tell iommu how to set the TSB size. */ 318 is->is_flags = IOMMU_TSBSIZE_IN_PTSB; 319 320 is->is_devhandle = pbm->vp_devhandle; 321 iommu_init(name, is, tsbsize, iobase); 322 } 323 324 325 int 326 vpci_print(void *aux, const char *p) 327 { 328 if (p == NULL) 329 return (UNCONF); 330 return (QUIET); 331 } 332 333 pcireg_t 334 vpci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 335 { 336 struct vpci_pbm *pbm = pc->cookie; 337 uint64_t error_flag, data; 338 339 int64_t hv_rc; 340 DPRINTF(VDB_CONF_READ, ("%s: tag %lx reg %x ", __func__, (long)tag, reg)); 341 hv_rc = hv_pci_config_get(pbm->vp_devhandle, PCITAG_OFFSET(tag), reg, 4, 342 &error_flag, &data); 343 if (hv_rc != H_EOK) 344 panic("hv_pci_config_get() failed - rc = %" PRId64 "\n", 345 hv_rc); 346 347 pcireg_t val = error_flag ? (pcireg_t)~0 : data; 348 DPRINTF(VDB_CONF_READ, (" returning %08x\n", (u_int)val)); 349 return val; 350 } 351 352 void 353 vpci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data) 354 { 355 356 struct vpci_pbm *pbm = pc->cookie; 357 uint64_t error_flag; 358 int64_t hv_rc; 359 DPRINTF(VDB_CONF_WRITE, ("%s: tag %lx; reg %x; data %x", __func__, 360 (long)tag, reg, (int)data)); 361 hv_rc = hv_pci_config_put(pbm->vp_devhandle, PCITAG_OFFSET(tag), reg, 4, 362 data, &error_flag); 363 if (hv_rc != H_EOK) 364 panic("hv_pci_config_put() failed - rc = %" PRId64 "\n", 365 hv_rc); 366 DPRINTF(VDB_CONF_WRITE, (" .. done\n")); 367 } 368 369 /* 370 * Bus-specific interrupt mapping 371 */ 372 int 373 vpci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 374 { 375 struct vpci_pbm *pbm = pa->pa_pc->cookie; 376 uint64_t devhandle = pbm->vp_devhandle; 377 uint64_t devino, sysino; 378 int err; 379 380 /* 381 * If we didn't find a PROM mapping for this interrupt. Try 382 * to construct one ourselves based on the swizzled interrupt 383 * pin. 384 */ 385 if (*ihp == (pci_intr_handle_t)-1 && pa->pa_intrpin != 0) 386 *ihp = pa->pa_intrpin; 387 388 if (*ihp != (pci_intr_handle_t)-1) { 389 devino = INTVEC(*ihp); 390 DPRINTF(VDB_INTR, ("vpci_intr_map(): devhandle 0x%lx devino 0x%lx\n", 391 devhandle, devino)); 392 err = sun4v_intr_devino_to_sysino(devhandle, devino, &sysino); 393 if (err != H_EOK) { 394 printf("sun4v_intr_devino_to_sysino(%#lx, %#lx) failed - err = %d\n", 395 (long unsigned int)devhandle, (long unsigned int)devino, err); 396 return (-1); 397 } 398 DPRINTF(VDB_INTR, ("vpci_intr_map(): sysino 0x%lx\n", sysino)); 399 *ihp = sysino; 400 return (0); 401 } 402 403 return (-1); 404 } 405 406 bus_space_tag_t 407 vpci_alloc_mem_tag(struct vpci_pbm *vp) 408 { 409 return (vpci_alloc_bus_tag(vp, "mem", PCI_MEMORY_BUS_SPACE)); 410 } 411 412 bus_space_tag_t 413 vpci_alloc_io_tag(struct vpci_pbm *vp) 414 { 415 return (vpci_alloc_bus_tag(vp, "io", PCI_IO_BUS_SPACE)); 416 } 417 418 bus_space_tag_t 419 vpci_alloc_config_tag(struct vpci_pbm *vp) 420 { 421 return (vpci_alloc_bus_tag(vp, "cfg", PCI_CONFIG_BUS_SPACE)); 422 } 423 424 bus_space_tag_t 425 vpci_alloc_bus_tag(struct vpci_pbm *pbm, const char *name, int type) 426 { 427 struct vpci_softc *sc = pbm->vp_sc; 428 struct sparc_bus_space_tag *bt; 429 430 bt = kmem_zalloc(sizeof(*bt), KM_SLEEP); 431 432 #if 0 433 snprintf(bt->name, sizeof(bt->name), "%s-pbm_%s(%d/%2.2x)", 434 device_xname(sc->sc_dev), name, ss, asi); 435 #endif 436 437 bt->cookie = pbm; 438 bt->parent = sc->sc_bustag; 439 bt->type = type; 440 bt->sparc_bus_map = vpci_bus_map; 441 bt->sparc_bus_mmap = vpci_bus_mmap; 442 bt->sparc_intr_establish = vpci_intr_establish; 443 return (bt); 444 } 445 446 bus_dma_tag_t 447 vpci_alloc_dma_tag(struct vpci_pbm *pbm) 448 { 449 struct vpci_softc *sc = pbm->vp_sc; 450 bus_dma_tag_t dt, pdt = sc->sc_dmat; 451 452 dt = kmem_zalloc(sizeof(*dt), KM_SLEEP); 453 dt->_cookie = pbm; 454 dt->_parent = pdt; 455 #define PCOPY(x) dt->x = pdt->x 456 dt->_dmamap_create = vpci_dmamap_create; 457 PCOPY(_dmamap_destroy); 458 dt->_dmamap_load = iommu_dvmamap_load; 459 PCOPY(_dmamap_load_mbuf); 460 PCOPY(_dmamap_load_uio); 461 dt->_dmamap_load_raw = iommu_dvmamap_load_raw; 462 dt->_dmamap_unload = iommu_dvmamap_unload; 463 dt->_dmamap_sync = iommu_dvmamap_sync; 464 dt->_dmamem_alloc = iommu_dvmamem_alloc; 465 dt->_dmamem_free = iommu_dvmamem_free; 466 dt->_dmamem_map = iommu_dvmamem_map; 467 dt->_dmamem_unmap = iommu_dvmamem_unmap; 468 PCOPY(_dmamem_mmap); 469 #undef PCOPY 470 return (dt); 471 } 472 473 pci_chipset_tag_t 474 vpci_alloc_chipset(struct vpci_pbm *pbm, int node, pci_chipset_tag_t pc) 475 { 476 pci_chipset_tag_t npc; 477 478 npc = kmem_alloc(sizeof *npc, KM_SLEEP); 479 memcpy(npc, pc, sizeof *pc); 480 npc->cookie = pbm; 481 npc->rootnode = node; 482 npc->spc_conf_read = vpci_conf_read; 483 npc->spc_conf_write = vpci_conf_write; 484 npc->spc_intr_map = vpci_intr_map; 485 npc->spc_intr_establish = vpci_pci_intr_establish; 486 npc->spc_find_ino = NULL; 487 return (npc); 488 } 489 490 int 491 vpci_dmamap_create(bus_dma_tag_t t, bus_size_t size, 492 int nsegments, bus_size_t maxsegsz, bus_size_t boundary, int flags, 493 bus_dmamap_t *dmamp) 494 { 495 struct vpci_pbm *pbm = t->_cookie; 496 int error; 497 498 error = bus_dmamap_create(t->_parent, size, nsegments, maxsegsz, 499 boundary, flags, dmamp); 500 if (error == 0) 501 (*dmamp)->_dm_cookie = &pbm->vp_sb; 502 return error; 503 } 504 505 int 506 vpci_bus_map(bus_space_tag_t t, bus_addr_t offset, 507 bus_size_t size, int flags, vaddr_t unused, bus_space_handle_t *hp) 508 { 509 struct vpci_pbm *pbm = t->cookie; 510 struct vpci_softc *sc = pbm->vp_sc; 511 int i, ss; 512 513 DPRINTF(VDB_BUSMAP, ("vpci_bus_map: type %d off %qx sz %qx flags %d", 514 t->type, 515 (unsigned long long)offset, 516 (unsigned long long)size, 517 flags)); 518 519 ss = sparc_pci_childspace(t->type); 520 DPRINTF(VDB_BUSMAP, (" cspace %d\n", ss)); 521 522 if (t->parent == 0 || t->parent->sparc_bus_map == 0) { 523 printf("\n_vpci_bus_map: invalid parent"); 524 return (EINVAL); 525 } 526 527 for (i = 0; i < pbm->vp_nrange; i++) { 528 bus_addr_t paddr; 529 struct vpci_range *pr = &pbm->vp_range[i]; 530 531 if (((pr->cspace >> 24) & 0x03) != ss) 532 continue; 533 534 paddr = BUS_ADDR(pr->phys_hi, pr->phys_lo + offset); 535 return ((*sc->sc_bustag->sparc_bus_map)(t, paddr, size, 536 flags, 0, hp)); 537 } 538 539 return (EINVAL); 540 } 541 542 paddr_t 543 vpci_bus_mmap(bus_space_tag_t t, bus_addr_t paddr, 544 off_t off, int prot, int flags) 545 { 546 bus_addr_t offset = paddr; 547 struct vpci_pbm *pbm = t->cookie; 548 struct vpci_softc *sc = pbm->vp_sc; 549 int i, ss; 550 551 ss = sparc_pci_childspace(t->type); 552 553 DPRINTF(VDB_BUSMAP, ("vpci_bus_mmap: prot %d flags %d pa %qx\n", 554 prot, flags, (unsigned long long)paddr)); 555 556 if (t->parent == 0 || t->parent->sparc_bus_mmap == 0) { 557 printf("\n_vpci_bus_mmap: invalid parent"); 558 return (-1); 559 } 560 561 for (i = 0; i < pbm->vp_nrange; i++) { 562 struct vpci_range *pr = &pbm->vp_range[i]; 563 564 if (((pr->cspace >> 24) & 0x03) != ss) 565 continue; 566 567 paddr = BUS_ADDR(pr->phys_hi, pr->phys_lo + offset); 568 return (bus_space_mmap(sc->sc_bustag, paddr, off, 569 prot, flags)); 570 } 571 572 return (-1); 573 } 574 575 void * 576 vpci_intr_establish(bus_space_tag_t t, int ihandle, int level, 577 int (*handler)(void *), void *arg, void (*fastvec)(void) /* ignored */) 578 { 579 struct vpci_pbm *pbm = t->cookie; 580 struct vpci_softc *sc = pbm->vp_sc; 581 uint64_t devhandle = sc->sc_devhandle; 582 struct intrhand *ih = NULL; 583 int ino; 584 585 ino = INTINO(ihandle); 586 DPRINTF(VDB_INTR, ("%s: ih %lx; level %d initial ino %#x\n", __func__, (u_long)ihandle, level, ino)); 587 588 if (level == IPL_NONE) { 589 level = INTLEV(ihandle); 590 printf(": IPL_NONE, setting IPL %d.\n", level); 591 } 592 if (level == IPL_NONE) { 593 level = 2; 594 printf(": no IPL, setting IPL 2.\n"); 595 } 596 597 ino |= INTVEC(ihandle); 598 DPRINTF(VDB_INTR, ("%s: ih %lx; level %d updated ino %#x\n", __func__, (u_long)ihandle, level, ino)); 599 600 ih = intrhand_alloc(); 601 602 ih->ih_ivec = ihandle; 603 ih->ih_fun = handler; 604 ih->ih_arg = arg; 605 ih->ih_pil = level; 606 ih->ih_number = ino; 607 ih->ih_pending = 0; 608 ih->ih_ack = vpci_intr_ack; 609 ih->ih_bus = t; 610 intr_establish(ih->ih_pil, level != IPL_VM, ih); 611 612 uint64_t sysino = INTVEC(ihandle); 613 DPRINTF(VDB_INTR, ("vpci_intr_establish(): sysino 0x%lx\n", sysino)); 614 615 int err; 616 617 err = sun4v_intr_setcookie(devhandle, sysino, (vaddr_t)ih); 618 if (err != H_EOK) 619 printf("sun4v_intr_setcookie(%#lx, %#lx, %#lx) failed - err = %d\n", 620 (long unsigned int)devhandle,(long unsigned int)sysino, 621 (long unsigned int)ih, err); 622 623 err = sun4v_intr_settarget(devhandle, sysino, cpus->ci_cpuid); 624 if (err != H_EOK) 625 printf("sun4v_intr_settarget(%#lx, %#lx, %d) failed - err = %d\n", 626 (long unsigned int)devhandle, (long unsigned int)sysino, 627 cpus->ci_cpuid, err); 628 629 /* Clear pending interrupts. */ 630 err = sun4v_intr_setstate(devhandle, sysino, INTR_IDLE); 631 if (err != H_EOK) 632 printf("sun4v_intr_setstate(%lx, %lu, INTR_IDLE) failed - err = %d\n", 633 (long unsigned int)devhandle, (long unsigned int)sysino, err); 634 635 err = sun4v_intr_setenabled(devhandle, sysino, INTR_ENABLED); 636 if (err != H_EOK) 637 printf("sun4v_intr_setenabled(%lx, %lu) failed - err = %d\n", 638 (long unsigned int)devhandle, (long unsigned int)sysino, err); 639 640 DPRINTF(VDB_INTR, ("%s() returning %p\n", __func__, ih)); 641 return (ih); 642 } 643 644 void 645 vpci_intr_ack(struct intrhand *ih) 646 { 647 bus_space_tag_t t = ih->ih_bus; 648 struct vpci_pbm *pbm = t->cookie; 649 uint64_t devhandle = pbm->vp_devhandle; 650 #if 0 651 DPRINTF(VDB_INTR, ("%s() devhandle %#lx ih_number %#x\n", 652 __func__, devhandle, ih->ih_number)); 653 #endif 654 int err; 655 err = sun4v_intr_setstate(devhandle, ih->ih_number, INTR_IDLE); 656 if (err != H_EOK) 657 printf("%s(%#lx, %u, INTR_IDLE) failed - err = %d\n", 658 __func__, (long unsigned int)devhandle, ih->ih_number, err); 659 } 660 661 static void * 662 vpci_pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, 663 int (*func)(void *), void *arg) 664 { 665 void *cookie; 666 struct vpci_pbm *pbm = (struct vpci_pbm *)pc->cookie; 667 668 DPRINTF(VDB_INTR, ("%s: ih %lx; level %d\n", __func__, (u_long)ih, level)); 669 cookie = bus_intr_establish(pbm->vp_memt, ih, level, func, arg); 670 671 DPRINTF(VDB_INTR, ("%s: returning handle %p\n", __func__, cookie)); 672 return (cookie); 673 } 674
Indexes created Sun Oct 25 00:26:45 UTC 2026