| /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/Disassembler/ |
| XCoreDisassembler.cpp | 755 uint32_t insn32; local
757 if (!readInstruction32(Bytes, Address, Size, insn32)) {
762 Result = decodeInstruction(DecoderTable32, instr, insn32, Address, this, STI);
|
| /src/sys/arch/riscv/riscv/ |
| db_disasm.c | 1449 uint32_t insn32; local
1469 insn32 = ((uint32_t)insn[1] << 16) | insn[0];
1470 if (db_disasm_32(loc, insn32, altfmt) != 0) {
|
| /src/external/gpl3/binutils/dist/bfd/ |
| coff-arm.c | 81 typedef unsigned long int insn32; typedef
998 static insn32
999 insert_thumb_branch (insn32 br_insn, int rel_off)
1093 static const insn32 a2t1_ldr_insn = 0xe59fc000;
1094 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
1095 static const insn32 a2t3_func_addr_insn = 0x00000001;
1119 static const insn32 t2a3_b_insn = 0xea000000;
1125 static const insn32 t2a5_pop_insn = 0xe8bd4040;
1126 static const insn32 t2a6_bx_insn = 0xe12fff1e;
|
| elfxx-mips.c | 475 bool insn32; member in struct:mips_elf_link_hash_table
1161 in the insn32 mode. */
1223 /* The format of subsequent microMIPS o32 PLT entries in the insn32 mode. */
9642 else if (htab->insn32)
9950 shorter by 4 bytes each too, unless in the insn32 mode. */
9955 else if (htab->insn32)
10195 else if (htab->insn32)
11243 else if (htab->insn32)
11323 else if (htab->insn32)
11353 if (htab->insn32)
14127 bool insn32 = mips_elf_hash_table (link_info)->insn32; local
[all...] |
| elf32-arm.c | 2280 typedef unsigned long int insn32; typedef
7142 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7143 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7144 static const insn32 a2t3_func_addr_insn = 0x00000001;
7147 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7148 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7151 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7152 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7153 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7174 static const insn32 t2a3_b_insn = 0xea000000
[all...] |
| /src/external/gpl3/binutils.old/dist/bfd/ |
| coff-arm.c | 81 typedef unsigned long int insn32; typedef
998 static insn32
999 insert_thumb_branch (insn32 br_insn, int rel_off)
1093 static const insn32 a2t1_ldr_insn = 0xe59fc000;
1094 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
1095 static const insn32 a2t3_func_addr_insn = 0x00000001;
1119 static const insn32 t2a3_b_insn = 0xea000000;
1125 static const insn32 t2a5_pop_insn = 0xe8bd4040;
1126 static const insn32 t2a6_bx_insn = 0xe12fff1e;
|
| elfxx-mips.c | 457 bool insn32; member in struct:mips_elf_link_hash_table
1160 in the insn32 mode. */
1222 /* The format of subsequent microMIPS o32 PLT entries in the insn32 mode. */
9622 else if (htab->insn32)
9930 shorter by 4 bytes each too, unless in the insn32 mode. */
9935 else if (htab->insn32)
10175 else if (htab->insn32)
11218 else if (htab->insn32)
11298 else if (htab->insn32)
11328 if (htab->insn32)
14076 bool insn32 = mips_elf_hash_table (link_info)->insn32; local
[all...] |
| elf32-arm.c | 2272 typedef unsigned long int insn32; typedef
7216 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7217 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7218 static const insn32 a2t3_func_addr_insn = 0x00000001;
7221 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7222 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7225 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7226 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7227 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7248 static const insn32 t2a3_b_insn = 0xea000000
[all...] |
| /src/external/gpl3/gdb/dist/bfd/ |
| coff-arm.c | 81 typedef unsigned long int insn32; typedef
998 static insn32
999 insert_thumb_branch (insn32 br_insn, int rel_off)
1093 static const insn32 a2t1_ldr_insn = 0xe59fc000;
1094 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
1095 static const insn32 a2t3_func_addr_insn = 0x00000001;
1119 static const insn32 t2a3_b_insn = 0xea000000;
1125 static const insn32 t2a5_pop_insn = 0xe8bd4040;
1126 static const insn32 t2a6_bx_insn = 0xe12fff1e;
|
| elfxx-mips.c | 457 bool insn32; member in struct:mips_elf_link_hash_table
1160 in the insn32 mode. */
1222 /* The format of subsequent microMIPS o32 PLT entries in the insn32 mode. */
9522 else if (htab->insn32)
9830 shorter by 4 bytes each too, unless in the insn32 mode. */
9835 else if (htab->insn32)
10074 else if (htab->insn32)
11113 else if (htab->insn32)
11193 else if (htab->insn32)
11223 if (htab->insn32)
13971 bool insn32 = mips_elf_hash_table (link_info)->insn32; local
[all...] |
| elf32-arm.c | 2272 typedef unsigned long int insn32; typedef
7211 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7212 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7213 static const insn32 a2t3_func_addr_insn = 0x00000001;
7216 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7217 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7220 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7221 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7222 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7243 static const insn32 t2a3_b_insn = 0xea000000
[all...] |
| /src/external/gpl3/gdb.old/dist/bfd/ |
| coff-arm.c | 81 typedef unsigned long int insn32; typedef
998 static insn32
999 insert_thumb_branch (insn32 br_insn, int rel_off)
1093 static const insn32 a2t1_ldr_insn = 0xe59fc000;
1094 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
1095 static const insn32 a2t3_func_addr_insn = 0x00000001;
1119 static const insn32 t2a3_b_insn = 0xea000000;
1125 static const insn32 t2a5_pop_insn = 0xe8bd4040;
1126 static const insn32 t2a6_bx_insn = 0xe12fff1e;
|
| elfxx-mips.c | 457 bool insn32; member in struct:mips_elf_link_hash_table
1162 in the insn32 mode. */
1224 /* The format of subsequent microMIPS o32 PLT entries in the insn32 mode. */
9535 else if (htab->insn32)
9843 shorter by 4 bytes each too, unless in the insn32 mode. */
9848 else if (htab->insn32)
10087 else if (htab->insn32)
11126 else if (htab->insn32)
11206 else if (htab->insn32)
11236 if (htab->insn32)
13984 bool insn32 = mips_elf_hash_table (link_info)->insn32; local
[all...] |
| elf32-arm.c | 2272 typedef unsigned long int insn32; typedef
7192 static const insn32 a2t1_ldr_insn = 0xe59fc000;
7193 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
7194 static const insn32 a2t3_func_addr_insn = 0x00000001;
7197 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
7198 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
7201 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
7202 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
7203 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
7224 static const insn32 t2a3_b_insn = 0xea000000
[all...] |
| /src/external/gpl3/binutils/dist/gas/config/ |
| tc-mips.c | 247 Changed by `.set insn32' and `.set noinsn32', and the -minsn32
248 and -mno-insn32 command line options. */
249 bool insn32; member in struct:mips_set_options
298 /* nomove */ 0, /* nobopt */ 0, /* noautoextend */ 0, /* insn32 */ false,
310 /* nomove */ 0, /* nobopt */ 0, /* noautoextend */ 0, /* insn32 */ false,
856 ? (mips_opts.insn32 \
863 || (mips_opts.micromips && !mips_opts.insn32)) \
1240 #define RELAX_MICROMIPS_ENCODE(type, at, insn32, pic, \
1246 | ((insn32) ? 0x2000 : 0) \
1724 {"mno-insn32", no_argument, NULL, OPTION_NO_INSN32}
18477 bool insn32 = true; local
19177 bool insn32 = RELAX_MICROMIPS_INSN32 (fragp->fr_subtype); local
[all...] |
| /src/external/gpl3/binutils.old/dist/gas/config/ |
| tc-mips.c | 247 Changed by `.set insn32' and `.set noinsn32', and the -minsn32
248 and -mno-insn32 command line options. */
249 bool insn32; member in struct:mips_set_options
298 /* nomove */ 0, /* nobopt */ 0, /* noautoextend */ 0, /* insn32 */ false,
310 /* nomove */ 0, /* nobopt */ 0, /* noautoextend */ 0, /* insn32 */ false,
852 ? (mips_opts.insn32 \
859 || (mips_opts.micromips && !mips_opts.insn32)) \
1236 #define RELAX_MICROMIPS_ENCODE(type, at, insn32, pic, \
1242 | ((insn32) ? 0x2000 : 0) \
1720 {"mno-insn32", no_argument, NULL, OPTION_NO_INSN32}
18166 bool insn32 = true; local
18865 bool insn32 = RELAX_MICROMIPS_INSN32 (fragp->fr_subtype); local
[all...] |
