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      1 /*	$NetBSD: db_interface.c,v 1.66 2025/09/20 06:27:30 mrg Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1996 Scott K. Stevens
      5  *
      6  * Mach Operating System
      7  * Copyright (c) 1991,1990 Carnegie Mellon University
      8  * All Rights Reserved.
      9  *
     10  * Permission to use, copy, modify and distribute this software and its
     11  * documentation is hereby granted, provided that both the copyright
     12  * notice and this permission notice appear in all copies of the
     13  * software, derivative works or modified versions, and any portions
     14  * thereof, and that both notices appear in supporting documentation.
     15  *
     16  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     17  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
     18  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     19  *
     20  * Carnegie Mellon requests users of this software to return to
     21  *
     22  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     23  *  School of Computer Science
     24  *  Carnegie Mellon University
     25  *  Pittsburgh PA 15213-3890
     26  *
     27  * any improvements or extensions that they make and grant Carnegie the
     28  * rights to redistribute these changes.
     29  *
     30  *	From: db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU)
     31  */
     32 
     33 /*
     34  * Interface to new debugger.
     35  */
     36 
     37 #include <sys/cdefs.h>
     38 __KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.66 2025/09/20 06:27:30 mrg Exp $");
     39 
     40 #include "opt_ddb.h"
     41 #include "opt_kgdb.h"
     42 #include "opt_multiprocessor.h"
     43 
     44 #include <sys/param.h>
     45 
     46 #include <sys/atomic.h>
     47 #include <sys/exec.h>
     48 #include <sys/intr.h>
     49 #include <sys/proc.h>
     50 #include <sys/reboot.h>
     51 #include <sys/systm.h>	/* just for boothowto */
     52 
     53 #include <uvm/uvm_extern.h>
     54 
     55 #include <arm/arm32/db_machdep.h>
     56 #include <arm/undefined.h>
     57 
     58 #include <ddb/db_access.h>
     59 #include <ddb/db_active.h>
     60 #include <ddb/db_command.h>
     61 #include <ddb/db_output.h>
     62 #include <ddb/db_variables.h>
     63 #include <ddb/db_sym.h>
     64 #include <ddb/db_extern.h>
     65 #include <ddb/db_interface.h>
     66 
     67 #include <dev/cons.h>
     68 
     69 #if defined(KGDB) || !defined(DDB)
     70 #define db_printf	printf
     71 #endif
     72 
     73 u_int db_fetch_reg(int, db_regs_t *);
     74 
     75 int db_trapper(u_int, u_int, trapframe_t *, int);
     76 
     77 int	db_active = 0;
     78 db_regs_t ddb_regs;	/* register state */
     79 db_regs_t *ddb_regp;
     80 
     81 #ifdef MULTIPROCESSOR
     82 volatile struct cpu_info *db_onproc;
     83 volatile struct cpu_info *db_newcpu;
     84 #endif
     85 
     86 
     87 
     88 
     89 #ifdef DDB
     90 /*
     91  *  kdb_trap - field a TRACE or BPT trap
     92  */
     93 int
     94 kdb_trap(int type, db_regs_t *regs)
     95 {
     96 	struct cpu_info * const ci = curcpu();
     97 	db_regs_t dbreg;
     98 	int s;
     99 
    100 	switch (type) {
    101 	case T_BREAKPOINT:	/* breakpoint */
    102 	case -1:		/* keyboard interrupt */
    103 		break;
    104 #ifdef MULTIPROCESSOR
    105 	case -2:
    106 		/*
    107 		 * We called to enter ddb from another process but by the time
    108 		 * we got here, no one was in ddb.  So ignore the request.
    109 		 */
    110 		if (db_onproc == NULL)
    111 			return 1;
    112 		break;
    113 #endif
    114 	default:
    115 		if (db_recover != 0) {
    116 			/* This will longjmp back into db_command_loop() */
    117 			db_error("Faulted in DDB; continuing...\n");
    118 			/*NOTREACHED*/
    119 		}
    120 	}
    121 
    122 	/* Should switch to kdb`s own stack here. */
    123 
    124 #ifdef MULTIPROCESSOR
    125 	const bool is_mp_p = ncpu > 1;
    126 	if (is_mp_p) {
    127 		/*
    128 		 * Try to take ownership of DDB.  If we do, tell all other
    129 		 * CPUs to enter DDB too.
    130 		 */
    131 		if (atomic_cas_ptr(&db_onproc, NULL, ci) == NULL) {
    132 			intr_ipi_send(NULL, IPI_DDB);
    133 		}
    134 	}
    135 	for (;;) {
    136 		if (is_mp_p) {
    137 			/*
    138 			 * While we aren't the master, wait until the master
    139 			 * gives control to us or exits.  If it exited, we
    140 			 * just exit too.  Otherwise this cpu will enter DDB.
    141 			 */
    142 			membar_consumer();
    143 			while (db_onproc != ci) {
    144 				if (db_onproc == NULL) {
    145 					ddb_regp = NULL;
    146 					return 1;
    147 				}
    148 #ifdef _ARM_ARCH_6
    149 				__asm __volatile("wfe");
    150 				membar_consumer();
    151 #endif
    152 				if (db_onproc == ci) {
    153 					printf("%s: switching to %s\n",
    154 					    __func__, ci->ci_cpuname);
    155 				}
    156 			}
    157 		}
    158 #endif
    159 
    160 		s = splhigh();
    161 		ci->ci_ddb_regs = &dbreg;
    162 		ddb_regp = &dbreg;
    163 		ddb_regs = *regs;
    164 
    165 		atomic_inc_32(&db_active);
    166 		cnpollc(true);
    167 		db_trap(type, 0/*code*/);
    168 		cnpollc(false);
    169 		atomic_dec_32(&db_active);
    170 
    171 		ci->ci_ddb_regs = NULL;
    172 		ddb_regp = &dbreg;
    173 		*regs = ddb_regs;
    174 		splx(s);
    175 
    176 #ifdef MULTIPROCESSOR
    177 		if (is_mp_p && db_newcpu != NULL) {
    178 			db_onproc = db_newcpu;
    179 			db_newcpu = NULL;
    180 			dsb(ishst);
    181 			sev();
    182 			continue;
    183 		}
    184 		break;
    185 	}
    186 
    187 	if (is_mp_p) {
    188 		/*
    189 		 * We are exiting DDB so there is noone onproc.  Tell
    190 		 * the other CPUs to exit.
    191 		 */
    192 		db_onproc = NULL;
    193 		dsb(ishst);
    194 		sev();
    195 	}
    196 #endif
    197 
    198 	ddb_regp = NULL;
    199 	return 1;
    200 }
    201 #endif
    202 
    203 int
    204 db_validate_address(vaddr_t addr)
    205 {
    206 	struct proc *p = curproc;
    207 	struct pmap *pmap;
    208 
    209 	if (!p || !p->p_vmspace || !p->p_vmspace->vm_map.pmap ||
    210 	    addr >= VM_MIN_KERNEL_ADDRESS
    211 	   )
    212 		pmap = pmap_kernel();
    213 	else
    214 		pmap = p->p_vmspace->vm_map.pmap;
    215 
    216 	return pmap_extract(pmap, addr, NULL) == false;
    217 }
    218 
    219 /*
    220  * Read bytes from kernel address space for debugger.
    221  */
    222 void
    223 db_read_bytes(vaddr_t addr, size_t size, char *data)
    224 {
    225 	char	*src = (char *)addr;
    226 
    227 	if (db_validate_address((u_int)src)) {
    228 		db_printf("address %p is invalid\n", src);
    229 		return;
    230 	}
    231 
    232 	if (size == 4 && (addr & 3) == 0 && ((uintptr_t)data & 3) == 0) {
    233 		*((int*)data) = *((int*)src);
    234 		return;
    235 	}
    236 
    237 	if (size == 2 && (addr & 1) == 0 && ((uintptr_t)data & 1) == 0) {
    238 		*((short*)data) = *((short*)src);
    239 		return;
    240 	}
    241 
    242 	while (size-- > 0) {
    243 		if (db_validate_address((u_int)src)) {
    244 			db_printf("address %p is invalid\n", src);
    245 			return;
    246 		}
    247 		*data++ = *src++;
    248 	}
    249 }
    250 
    251 static void
    252 db_write_text(vaddr_t addr, size_t size, const char *data)
    253 {
    254 
    255 	ktext_write((void *)addr, data, size);
    256 }
    257 
    258 /*
    259  * Write bytes to kernel address space for debugger.
    260  */
    261 void
    262 db_write_bytes(vaddr_t addr, size_t size, const char *data)
    263 {
    264 	extern char kernel_text[];
    265 	extern char etext[];
    266 	char *dst;
    267 	size_t loop;
    268 
    269 	/* If any part is in kernel text, use db_write_text() */
    270 	if (addr >= (vaddr_t) kernel_text && addr < (vaddr_t) etext) {
    271 		db_write_text(addr, size, data);
    272 		return;
    273 	}
    274 
    275 	dst = (char *)addr;
    276 	if (db_validate_address((u_int)dst)) {
    277 		db_printf("address %p is invalid\n", dst);
    278 		return;
    279 	}
    280 
    281 	if (size == 4 && (addr & 3) == 0 && ((uintptr_t)data & 3) == 0)
    282 		*((int *)dst) = *((const int *)data);
    283 	else
    284 	if (size == 2 && (addr & 1) == 0 && ((uintptr_t)data & 1) == 0)
    285 		*((short *)dst) = *((const short *)data);
    286 	else {
    287 		loop = size;
    288 		while (loop-- > 0) {
    289 			if (db_validate_address((u_int)dst)) {
    290 				db_printf("address %p is invalid\n", dst);
    291 				return;
    292 			}
    293 			*dst++ = *data++;
    294 		}
    295 	}
    296 
    297 	/* make sure the caches and memory are in sync */
    298 	cpu_icache_sync_range(addr, size);
    299 
    300 	/* In case the current page tables have been modified ... */
    301 	cpu_tlb_flushID();
    302 	cpu_cpwait();
    303 }
    304 
    305 #ifdef DDB
    306 void
    307 cpu_Debugger(void)
    308 {
    309 #ifdef _ARM_ARCH_BE8
    310 	__asm(".word	0xffffffe7");
    311 #else
    312 	__asm(".word	0xe7ffffff");
    313 #endif
    314 }
    315 
    316 int
    317 db_trapper(u_int addr, u_int inst, trapframe_t *frame, int fault_code)
    318 {
    319 
    320 	if (fault_code == 0) {
    321 		if ((inst & ~INSN_COND_MASK) == (BKPT_INST & ~INSN_COND_MASK))
    322 			kdb_trap(T_BREAKPOINT, frame);
    323 		else
    324 			kdb_trap(-1, frame);
    325 	} else
    326 		return 1;
    327 	return 0;
    328 }
    329 
    330 extern u_int esym;
    331 extern u_int end;
    332 
    333 static struct undefined_handler db_uh;
    334 
    335 void
    336 db_machine_init(void)
    337 {
    338 
    339 	/*
    340 	 * We get called before malloc() is available, so supply a static
    341 	 * struct undefined_handler.
    342 	 */
    343 	db_uh.uh_handler = db_trapper;
    344 	install_coproc_handler_static(CORE_UNKNOWN_HANDLER, &db_uh);
    345 }
    346 #endif
    347 
    348 u_int
    349 db_fetch_reg(int reg, db_regs_t *regs)
    350 {
    351 
    352 	switch (reg) {
    353 	case 0:
    354 		return regs->tf_r0;
    355 	case 1:
    356 		return regs->tf_r1;
    357 	case 2:
    358 		return regs->tf_r2;
    359 	case 3:
    360 		return regs->tf_r3;
    361 	case 4:
    362 		return regs->tf_r4;
    363 	case 5:
    364 		return regs->tf_r5;
    365 	case 6:
    366 		return regs->tf_r6;
    367 	case 7:
    368 		return regs->tf_r7;
    369 	case 8:
    370 		return regs->tf_r8;
    371 	case 9:
    372 		return regs->tf_r9;
    373 	case 10:
    374 		return regs->tf_r10;
    375 	case 11:
    376 		return regs->tf_r11;
    377 	case 12:
    378 		return regs->tf_r12;
    379 	case 13:
    380 		return regs->tf_svc_sp;
    381 	case 14:
    382 		return regs->tf_svc_lr;
    383 	case 15:
    384 		return regs->tf_pc;
    385 	default:
    386 		panic("db_fetch_reg: botch");
    387 	}
    388 }
    389 
    390 u_int
    391 branch_taken(u_int insn, u_int pc, db_regs_t *regs)
    392 {
    393 	u_int addr, nregs;
    394 
    395 	switch ((insn >> 24) & 0xf) {
    396 	case 0xa:	/* b ... */
    397 	case 0xb:	/* bl ... */
    398 		addr = ((insn << 2) & 0x03ffffff);
    399 		if (addr & 0x02000000)
    400 			addr |= 0xfc000000;
    401 		return pc + 8 + addr;
    402 	case 0x7:	/* ldr pc, [pc, reg, lsl #2] */
    403 		addr = db_fetch_reg(insn & 0xf, regs);
    404 		addr = pc + 8 + (addr << 2);
    405 		db_read_bytes(addr, 4, (char *)&addr);
    406 		return addr;
    407 	case 0x5:	/* ldr pc, [reg] */
    408 		addr = db_fetch_reg((insn >> 16) & 0xf, regs);
    409 		db_read_bytes(addr, 4, (char *)&addr);
    410 		return addr;
    411 	case 0x1:	/* mov pc, reg */
    412 		addr = db_fetch_reg(insn & 0xf, regs);
    413 		return addr;
    414 	case 0x8:	/* ldmxx reg, {..., pc} */
    415 	case 0x9:
    416 		addr = db_fetch_reg((insn >> 16) & 0xf, regs);
    417 		nregs = (insn  & 0x5555) + ((insn  >> 1) & 0x5555);
    418 		nregs = (nregs & 0x3333) + ((nregs >> 2) & 0x3333);
    419 		nregs = (nregs + (nregs >> 4)) & 0x0f0f;
    420 		nregs = (nregs + (nregs >> 8)) & 0x001f;
    421 		switch ((insn >> 23) & 0x3) {
    422 		case 0x0:	/* ldmda */
    423 			addr = addr - 0;
    424 			break;
    425 		case 0x1:	/* ldmia */
    426 			addr = addr + 0 + ((nregs - 1) << 2);
    427 			break;
    428 		case 0x2:	/* ldmdb */
    429 			addr = addr - 4;
    430 			break;
    431 		case 0x3:	/* ldmib */
    432 			addr = addr + 4 + ((nregs - 1) << 2);
    433 			break;
    434 		}
    435 		db_read_bytes(addr, 4, (char *)&addr);
    436 		return addr;
    437 	default:
    438 		panic("branch_taken: botch");
    439 	}
    440 }
    441