1 /* $NetBSD: ki2c.c,v 1.44 2025/09/28 11:32:23 thorpej Exp $ */ 2 /* Id: ki2c.c,v 1.7 2002/10/05 09:56:05 tsubai Exp */ 3 4 /*- 5 * Copyright (c) 2001 Tsubai Masanari. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include <sys/param.h> 31 #include <sys/device.h> 32 #include <sys/systm.h> 33 #include <sys/mutex.h> 34 35 #include <dev/ofw/openfirm.h> 36 #include <machine/autoconf.h> 37 #include <powerpc/pic/picvar.h> 38 39 #include "opt_ki2c.h" 40 #include <macppc/dev/ki2cvar.h> 41 42 #ifdef KI2C_DEBUG 43 #define DPRINTF printf 44 #else 45 #define DPRINTF while (0) printf 46 #endif 47 48 #define KI2C_EXEC_MAX_CMDLEN 32 49 #define KI2C_EXEC_MAX_BUFLEN 32 50 51 int ki2c_match(device_t, cfdata_t, void *); 52 void ki2c_attach(device_t, device_t, void *); 53 inline uint8_t ki2c_readreg(struct ki2c_softc *, int); 54 inline void ki2c_writereg(struct ki2c_softc *, int, uint8_t); 55 u_int ki2c_getmode(struct ki2c_softc *); 56 void ki2c_setmode(struct ki2c_softc *, u_int); 57 u_int ki2c_getspeed(struct ki2c_softc *); 58 void ki2c_setspeed(struct ki2c_softc *, u_int); 59 int ki2c_intr(void *); 60 int ki2c_poll(struct ki2c_softc *, int); 61 int ki2c_start(struct ki2c_softc *, int, int, void *, int); 62 int ki2c_read(struct ki2c_softc *, int, int, void *, int); 63 int ki2c_write(struct ki2c_softc *, int, int, void *, int); 64 65 /* I2C glue */ 66 static int ki2c_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t, 67 void *, size_t, int); 68 69 static void 70 ki2c_select_channel(struct ki2c_softc *sc, int channel) 71 { 72 uint8_t val = channel ? 0x10 : 0x00; 73 74 /* We handle the subaddress stuff ourselves. */ 75 ki2c_setmode(sc, val | I2C_STDMODE); 76 } 77 78 static int 79 ki2c_acquire_bus(void *v, int flags) 80 { 81 struct ki2c_channel *ch = v; 82 struct ki2c_softc *sc = ch->ch_sc; 83 84 int error = iic_acquire_bus_lock(&sc->sc_mux_lock, flags); 85 if (error) { 86 return error; 87 } 88 89 ki2c_select_channel(sc, ch->ch_channel); 90 return 0; 91 } 92 93 static void 94 ki2c_release_bus(void *v, int flags) 95 { 96 struct ki2c_channel *ch = v; 97 struct ki2c_softc *sc = ch->ch_sc; 98 99 iic_release_bus_lock(&sc->sc_mux_lock); 100 } 101 102 static void 103 ki2c_init_channel(struct ki2c_softc *sc, int channel, int node) 104 { 105 struct ki2c_channel *ch = &sc->sc_channels[channel]; 106 107 /* 108 * XXX PowerMac G5 11,2 has two channel-0 nodes for ki2c1. 109 * 110 * The first one has 2 audio codecs, the second one has 111 * only 1 (which is a duplicate of the pcm3052 under the 112 * first node). This //appears// to be an error in the 113 * OpenFirmware device tree. 114 * 115 * See port-macppc/59673. 116 */ 117 if (ch->ch_sc != NULL) { 118 aprint_debug_dev(sc->sc_dev, 119 "skipping duplicate channel %d (device tree error?)\n", 120 channel); 121 return; 122 } 123 124 iic_tag_init(&ch->ch_i2c); 125 ch->ch_i2c.ic_channel = channel; 126 ch->ch_i2c.ic_cookie = ch; 127 ch->ch_i2c.ic_exec = ki2c_i2c_exec; 128 ch->ch_i2c.ic_acquire_bus = ki2c_acquire_bus; 129 ch->ch_i2c.ic_release_bus = ki2c_release_bus; 130 131 ch->ch_sc = sc; 132 ch->ch_node = node; 133 ch->ch_channel = channel; 134 } 135 136 CFATTACH_DECL_NEW(ki2c, sizeof(struct ki2c_softc), ki2c_match, ki2c_attach, 137 NULL, NULL); 138 139 int 140 ki2c_match(device_t parent, cfdata_t match, void *aux) 141 { 142 struct confargs *ca = aux; 143 144 if (strcmp(ca->ca_name, "i2c") == 0) 145 return 1; 146 147 return 0; 148 } 149 150 void 151 ki2c_attach(device_t parent, device_t self, void *aux) 152 { 153 struct ki2c_softc *sc = device_private(self); 154 struct confargs *ca = aux; 155 int node = ca->ca_node, root; 156 uint32_t addr, channel, intr[2]; 157 int rate, child; 158 int intrparent; 159 char name[32], intr_xname[32], model[32]; 160 uint32_t picbase; 161 162 sc->sc_dev = self; 163 sc->sc_tag = ca->ca_tag; 164 ca->ca_reg[0] += ca->ca_baseaddr; 165 166 root = OF_finddevice("/"); 167 model[0] = 0; 168 OF_getprop(root, "model", model, 32); 169 DPRINTF("model %s\n", model); 170 if (OF_getprop(node, "AAPL,i2c-rate", &rate, 4) != 4) { 171 aprint_error(": cannot get i2c-rate\n"); 172 return; 173 } 174 if (OF_getprop(node, "AAPL,address", &addr, 4) != 4) { 175 aprint_error(": unable to find i2c address\n"); 176 return; 177 } 178 if (bus_space_map(sc->sc_tag, addr, PAGE_SIZE, 0, &sc->sc_bh) != 0) { 179 aprint_error_dev(sc->sc_dev, "failed to map registers\n"); 180 return; 181 } 182 183 if (OF_getprop(node, "AAPL,address-step", &sc->sc_regstep, 4) != 4) { 184 aprint_error(": unable to find i2c address step\n"); 185 return; 186 } 187 188 if(OF_getprop(node, "interrupts", intr, 8) != 8) { 189 aprint_error(": can't find interrupt\n"); 190 return; 191 } 192 193 /* 194 * on some G5 we have two openpics, one in mac-io, one in /u3 195 * in order to get interrupts we need to know which one we're 196 * connected to 197 */ 198 sc->sc_poll = 0; 199 200 if(OF_getprop(node, "interrupt-parent", &intrparent, 4) == 4) { 201 uint32_t preg[8]; 202 struct pic_ops *pic; 203 204 sc->sc_poll = 1; 205 if(OF_getprop(intrparent, "reg", preg, 8) > 4) { 206 /* now look for a pic with that base... */ 207 picbase = preg[0]; 208 if ((picbase & 0x80000000) == 0) { 209 /* some OF versions have the openpic's reg as 210 * an offset into mac-io just to be annoying */ 211 int mio = OF_parent(intrparent); 212 if (OF_getprop(mio, "ranges", preg, 20) == 20) 213 picbase += preg[3]; 214 } 215 DPRINTF("PIC base %08x\n", picbase); 216 pic = find_pic_by_cookie((void *)picbase); 217 if (pic != NULL) { 218 sc->sc_poll = 0; 219 intr[0] += pic->pic_intrbase; 220 } 221 } 222 } 223 224 if (sc->sc_poll) { 225 aprint_normal(" polling"); 226 } else aprint_normal(" irq %d", intr[0]); 227 228 printf("\n"); 229 230 ki2c_writereg(sc, STATUS, 0); 231 ki2c_writereg(sc, ISR, 0); 232 ki2c_writereg(sc, IER, 0); 233 234 ki2c_setmode(sc, I2C_STDSUBMODE); 235 ki2c_setspeed(sc, I2C_100kHz); /* XXX rate */ 236 237 ki2c_writereg(sc, IER,I2C_INT_DATA|I2C_INT_ADDR|I2C_INT_STOP); 238 239 /* 240 * Newer OpenFirmware will have "i2c-bus" nodes below the controller 241 * node. If we don't find any, then the devices are direct children 242 * of the controller node, and the channel number is encoded in 243 * bit 8 of the i2c address cell (see ofw_i2c_machdep.c). 244 */ 245 bool found_busnode = false; 246 for (child = OF_child(node); child != 0; child = OF_peer(child)) { 247 OF_getprop(child, "name", name, sizeof(name)); 248 if (strcmp(name, "i2c-bus") == 0) { 249 OF_getprop(child, "reg", &channel, sizeof(channel)); 250 DPRINTF("found channel %x\n", channel); 251 if (channel >= KI2C_MAX_CHANNELS) { 252 aprint_error_dev(self, 253 "ignoring invalid I2C channel %u\n", 254 channel); 255 continue; 256 } 257 ki2c_init_channel(sc, channel, child); 258 found_busnode = true; 259 } 260 } 261 if (!found_busnode) { 262 for (channel = 0; channel < KI2C_MAX_CHANNELS; channel++) { 263 ki2c_init_channel(sc, channel, node); 264 } 265 } 266 267 /* 268 * The Keywest I2C controller has a built-in I2C mux, but it's not 269 * really a distinct device in the device tree, so we handle it here. 270 * 271 * The locking order is: 272 * 273 * iic bus mutex -> mux_lock 274 * 275 * mux_lock is taken in ki2c_acquire_bus(). 276 */ 277 mutex_init(&sc->sc_mux_lock, MUTEX_DEFAULT, IPL_NONE); 278 279 cv_init(&sc->sc_todev, device_xname(self)); 280 mutex_init(&sc->sc_todevmtx, MUTEX_DEFAULT, IPL_NONE); 281 282 if(sc->sc_poll == 0) { 283 snprintf(intr_xname, sizeof(intr_xname), "%s intr", device_xname(self)); 284 intr_establish_xname(intr[0], (intr[1] & 1) ? IST_LEVEL : IST_EDGE, 285 IPL_BIO, ki2c_intr, sc, intr_xname); 286 287 ki2c_writereg(sc, IER, I2C_INT_DATA | I2C_INT_ADDR| I2C_INT_STOP); 288 } 289 290 for (channel = 0; channel < KI2C_MAX_CHANNELS; channel++) { 291 if (sc->sc_channels[channel].ch_node == 0) { 292 continue; 293 } 294 iicbus_attach_with_devhandle(sc->sc_dev, 295 &sc->sc_channels[channel].ch_i2c, 296 devhandle_from_of(device_handle(sc->sc_dev), 297 sc->sc_channels[channel].ch_node)); 298 } 299 } 300 301 uint8_t 302 ki2c_readreg(struct ki2c_softc *sc, int reg) 303 { 304 305 return bus_space_read_1(sc->sc_tag, sc->sc_bh, sc->sc_regstep * reg); 306 } 307 308 void 309 ki2c_writereg(struct ki2c_softc *sc, int reg, uint8_t val) 310 { 311 312 bus_space_write_1(sc->sc_tag, sc->sc_bh, reg * sc->sc_regstep, val); 313 delay(10); 314 } 315 316 u_int 317 ki2c_getmode(struct ki2c_softc *sc) 318 { 319 return ki2c_readreg(sc, MODE) & I2C_MODE; 320 } 321 322 void 323 ki2c_setmode(struct ki2c_softc *sc, u_int mode) 324 { 325 ki2c_writereg(sc, MODE, mode); 326 } 327 328 u_int 329 ki2c_getspeed(struct ki2c_softc *sc) 330 { 331 return ki2c_readreg(sc, MODE) & I2C_SPEED; 332 } 333 334 void 335 ki2c_setspeed(struct ki2c_softc *sc, u_int speed) 336 { 337 u_int x; 338 339 KASSERT((speed & ~I2C_SPEED) == 0); 340 x = ki2c_readreg(sc, MODE); 341 x &= ~I2C_SPEED; 342 x |= speed; 343 ki2c_writereg(sc, MODE, x); 344 } 345 346 int 347 ki2c_intr(void *cookie) 348 { 349 struct ki2c_softc *sc = cookie; 350 u_int isr, x; 351 isr = ki2c_readreg(sc, ISR); 352 if (isr & I2C_INT_ADDR) { 353 #if 0 354 if ((ki2c_readreg(sc, STATUS) & I2C_ST_LASTAAK) == 0) { 355 /* No slave responded. */ 356 sc->sc_flags |= I2C_ERROR; 357 goto out; 358 } 359 #endif 360 361 if (sc->sc_flags & I2C_READING) { 362 if (sc->sc_resid > 1) { 363 x = ki2c_readreg(sc, CONTROL); 364 x |= I2C_CT_AAK; 365 ki2c_writereg(sc, CONTROL, x); 366 } 367 } else { 368 ki2c_writereg(sc, DATA, *sc->sc_data++); 369 sc->sc_resid--; 370 } 371 } 372 373 if (isr & I2C_INT_DATA) { 374 if (sc->sc_flags & I2C_READING) { 375 *sc->sc_data++ = ki2c_readreg(sc, DATA); 376 sc->sc_resid--; 377 378 if (sc->sc_resid == 0) { /* Completed */ 379 ki2c_writereg(sc, CONTROL, 0); 380 goto out; 381 } 382 } else { 383 #if 0 384 if ((ki2c_readreg(sc, STATUS) & I2C_ST_LASTAAK) == 0) { 385 /* No slave responded. */ 386 sc->sc_flags |= I2C_ERROR; 387 goto out; 388 } 389 #endif 390 391 if (sc->sc_resid == 0) { 392 x = ki2c_readreg(sc, CONTROL) | I2C_CT_STOP; 393 ki2c_writereg(sc, CONTROL, x); 394 } else { 395 ki2c_writereg(sc, DATA, *sc->sc_data++); 396 sc->sc_resid--; 397 } 398 } 399 } 400 401 out: 402 if (isr & I2C_INT_STOP) { 403 ki2c_writereg(sc, CONTROL, 0); 404 sc->sc_flags &= ~I2C_BUSY; 405 cv_signal(&sc->sc_todev); 406 } 407 408 ki2c_writereg(sc, ISR, isr); 409 410 return 1; 411 } 412 413 int 414 ki2c_poll(struct ki2c_softc *sc, int timo) 415 { 416 int bail = 0; 417 while (sc->sc_flags & I2C_BUSY) { 418 if ((cold) || (bail > 10) || (sc->sc_poll)) { 419 if (ki2c_readreg(sc, ISR)) 420 ki2c_intr(sc); 421 timo -= 10; 422 if (timo < 0) { 423 DPRINTF("i2c_poll: timeout\n"); 424 return -1; 425 } 426 delay(10); 427 } else { 428 mutex_enter(&sc->sc_todevmtx); 429 cv_timedwait_sig(&sc->sc_todev, &sc->sc_todevmtx, hz/10); 430 mutex_exit(&sc->sc_todevmtx); 431 bail++; 432 } 433 } 434 return 0; 435 } 436 437 int 438 ki2c_start(struct ki2c_softc *sc, int addr, int subaddr, void *data, int len) 439 { 440 int rw = (sc->sc_flags & I2C_READING) ? 1 : 0; 441 int timo, x; 442 443 KASSERT((addr & 1) == 0); 444 445 sc->sc_data = data; 446 sc->sc_resid = len; 447 sc->sc_flags |= I2C_BUSY; 448 449 timo = 1000 + len * 200; 450 451 /* XXX TAS3001 sometimes takes 50ms to finish writing registers. */ 452 /* if (addr == 0x68) */ 453 timo += 100000; 454 455 ki2c_writereg(sc, ADDR, addr | rw); 456 ki2c_writereg(sc, SUBADDR, subaddr); 457 458 x = ki2c_readreg(sc, CONTROL) | I2C_CT_ADDR; 459 ki2c_writereg(sc, CONTROL, x); 460 461 if (ki2c_poll(sc, timo)) 462 return -1; 463 if (sc->sc_flags & I2C_ERROR) { 464 DPRINTF("I2C_ERROR\n"); 465 return -1; 466 } 467 return 0; 468 } 469 470 int 471 ki2c_read(struct ki2c_softc *sc, int addr, int subaddr, void *data, int len) 472 { 473 sc->sc_flags = I2C_READING; 474 DPRINTF("ki2c_read: %02x %d\n", addr, len); 475 return ki2c_start(sc, addr, subaddr, data, len); 476 } 477 478 int 479 ki2c_write(struct ki2c_softc *sc, int addr, int subaddr, void *data, int len) 480 { 481 sc->sc_flags = 0; 482 DPRINTF("ki2c_write: %02x %d\n",addr,len); 483 return ki2c_start(sc, addr, subaddr, data, len); 484 } 485 486 int 487 ki2c_i2c_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, const void *vcmd, 488 size_t cmdlen, void *vbuf, size_t buflen, int flags) 489 { 490 struct ki2c_channel *ch = cookie; 491 struct ki2c_softc *sc = ch->ch_sc; 492 int i; 493 size_t w_len; 494 uint8_t *wp; 495 uint8_t wrbuf[KI2C_EXEC_MAX_CMDLEN + KI2C_EXEC_MAX_CMDLEN]; 496 497 /* 498 * We don't have any idea if the ki2c controller can execute 499 * i2c quick_{read,write} operations, so if someone tries one, 500 * return an error. 501 */ 502 if (cmdlen == 0 && buflen == 0) 503 return -1; 504 505 /* 506 * Transaction could be much larger now. Bail if it exceeds our 507 * small combining buffer, we don't expect such devices. 508 */ 509 if (cmdlen + buflen > sizeof(wrbuf)) 510 return -1; 511 512 addr &= 0x7f; /* KASSERT((addr & ~0x7f) == 0); ??? */ 513 514 ki2c_setspeed(sc, I2C_50kHz); 515 516 /* Write-buffer defaults to vcmd */ 517 wp = (uint8_t *)(__UNCONST(vcmd)); 518 w_len = cmdlen; 519 520 /* 521 * Concatenate vcmd and vbuf for write operations 522 * 523 * Drivers written specifically for ki2c might already do this, 524 * but "generic" i2c drivers still provide separate arguments 525 * for the cmd and buf parts of iic_smbus_write_{byte,word}. 526 */ 527 if (I2C_OP_WRITE_P(op) && buflen != 0) { 528 if (cmdlen == 0) { 529 wp = (uint8_t *)vbuf; 530 w_len = buflen; 531 } else { 532 KASSERT((cmdlen + buflen) <= sizeof(wrbuf)); 533 wp = (uint8_t *)(__UNCONST(vcmd)); 534 w_len = 0; 535 for (i = 0; i < cmdlen; i++) 536 wrbuf[w_len++] = *wp++; 537 wp = (uint8_t *)vbuf; 538 for (i = 0; i < buflen; i++) 539 wrbuf[w_len++] = *wp++; 540 wp = wrbuf; 541 } 542 } 543 544 if (w_len > 0) 545 if (ki2c_write(sc, addr << 1, 0, wp, w_len) !=0 ) 546 return -1; 547 548 if (I2C_OP_READ_P(op)) { 549 if (ki2c_read(sc, addr << 1, 0, vbuf, buflen) !=0 ) 550 return -1; 551 } 552 return 0; 553 } 554
Indexes created Mon Sep 29 15:09:53 GMT 2025