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      1 /*	$NetBSD: ofwreal.S,v 1.17 2023/06/24 05:31:05 msaitoh Exp $	*/
      2 
      3 /*
      4  * Copyright (C) 1996 Wolfgang Solfrank.
      5  * Copyright (C) 1996 TooLs GmbH.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed by TooLs GmbH.
     19  * 4. The name of TooLs GmbH may not be used to endorse or promote products
     20  *    derived from this software without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
     23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     27  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     28  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     29  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     30  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     31  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 /*
     35  * This file provides a real-mode client interface on machines, that
     36  * (incorrectly) only implement virtual mode client interface.
     37  *
     38  * It assumes though, that any actual memory in the machine is
     39  * mapped 1:1 even by the virtual mode OpenFirmware.
     40  * Furthermore it assumes that addresses returned by OpenFirmware are not
     41  * accessed by the client.
     42  *
     43  * TODO: handle set-callback specially
     44  */
     45 
     46 #include <machine/psl.h>
     47 #include <machine/trap.h>
     48 #include <machine/asm.h>
     49 
     50 #define	CACHELINE	32		/* Note that this value is really
     51 					   hardwired */
     52 
     53 	.data
     54 ofentry:
     55 	.long	0			/* actual entry to firmware in
     56 					   virtual mode */
     57 
     58 #define	BATSIZE		(8*8)
     59 #define	SRSIZE		(16*4)
     60 #define	SPRGSIZE	(4*4)
     61 #define	SDR1SIZE	4
     62 #define	SI1SIZE		(2*256)
     63 #define	SI2SIZE		(3*256)
     64 #define	SVSIZE		(BATSIZE+SRSIZE+SPRGSIZE+SDR1SIZE+SI1SIZE+SI2SIZE)
     65 
     66 	.local	fwsave
     67 	.comm	fwsave,SVSIZE,8
     68 
     69 	.local	clsave
     70 	.comm	clsave,SVSIZE,8
     71 
     72 ENTRY(ofwr_init)
     73 	mflr	%r31			/* save return address */
     74 
     75 	mr	%r13,%r6		/* save args */
     76 	mr	%r12,%r7		/* save argslen */
     77 	lis	%r8,ofentry@ha
     78 	stw	%r5,ofentry@l(%r8)	/* save virtual mode firmware entry */
     79 
     80 	lis	%r3,fwsave@ha		/* save the mmu values of the
     81 					   firmware */
     82 	addi	%r3,%r3,fwsave@l
     83 	bl	savemmu
     84 
     85 	lis	%r5,fwentry@ha		/* get new firmware entry */
     86 	addi	%r5,%r5,fwentry@l
     87 
     88 	mr	%r6,%r13		/* restore args pointer */
     89 	mr	%r7,%r12		/* restore args length */
     90 	mtlr	%r31			/* restore return address */
     91 	blr
     92 
     93 /*
     94  * Emulated firmware entry.
     95  */
     96 fwentry:
     97 	mflr	%r0			/* save return address */
     98 	stw	%r0,4(%r1)
     99 	stwu	%r1,-32(%r1)		/* setup stack frame */
    100 	stw	%r3,8(%r1)		/* save arg */
    101 	stw	%r2,16(%r1)		/* save r2 */
    102 	stw	%r13,20(%r1)		/* save r13 */
    103 
    104 	lis	%r3,clsave@ha		/* save mmu values of client */
    105 	addi	%r3,%r3,clsave@l
    106 	bl	savemmu
    107 
    108 	lis	%r3,fwsave@ha		/* restore mmu values of firmware */
    109 	addi	%r3,%r3,fwsave@l
    110 	bl	restoremmu
    111 
    112 	lis	%r3,ofentry@ha
    113 	lwz	%r3,ofentry@l(%r3)	/* get actual firmware entry */
    114 	mtlr	%r3
    115 
    116 	mfmsr	%r4
    117 	stw	%r4,12(%r1)		/* save MSR */
    118 	ori	%r4,%r4,PSL_IR|PSL_DR	/* turn on MMU */
    119 	andi.	%r4,%r4,~PSL_EE@l	/* turn off interrupts */
    120 	mtmsr	%r4
    121 	isync
    122 
    123 	lwz	%r3,8(%r1)		/* restore arg */
    124 	blrl				/* do actual firmware call */
    125 	stw	%r3,8(%r1)		/* save return value */
    126 
    127 	lwz	%r4,12(%r1)		/* get saved MSR */
    128 	mtmsr	%r4
    129 	isync
    130 
    131 	lis	%r3,fwsave@ha		/* save mmu values of firmware */
    132 	addi	%r3,%r3,fwsave@l	/* (might not be necessary, but... */
    133 	bl	savemmu
    134 
    135 	lis	%r3,clsave@ha		/* restore mmu values of client */
    136 	addi	%r3,%r3,clsave@l
    137 	bl	restoremmu
    138 
    139 	lwz	%r13,20(%r1)		/* restore saved value */
    140 	lwz	%r2,16(%r1)		/* restore saved value */
    141 	lwz	%r3,8(%r1)		/* restore return value */
    142 	lwz	%r1,0(%r1)		/* and return */
    143 	lwz	%r0,4(%r1)
    144 	mtlr	%r0
    145 	blr
    146 
    147 /*
    148  * Save everything related to the mmu to the saveare pointed to by r3.
    149  */
    150 savemmu:
    151 
    152 	mfibatl	%r4,0			/* save BATs */
    153 	stw	%r4,0(%r3)
    154 	mfibatu	%r4,0
    155 	stw	%r4,4(%r3)
    156 	mfibatl	%r4,1
    157 	stw	%r4,8(%r3)
    158 	mfibatu	%r4,1
    159 	stw	%r4,12(%r3)
    160 	mfibatl	%r4,2
    161 	stw	%r4,16(%r3)
    162 	mfibatu	%r4,2
    163 	stw	%r4,20(%r3)
    164 	mfibatl	%r4,3
    165 	stw	%r4,24(%r3)
    166 	mfibatu	%r4,3
    167 	stw	%r4,28(%r3)
    168 	mfdbatl	%r4,0
    169 	stw	%r4,32(%r3)
    170 	mfdbatu	%r4,0
    171 	stw	%r4,36(%r3)
    172 	mfdbatl	%r4,1
    173 	stw	%r4,40(%r3)
    174 	mfdbatu	%r4,1
    175 	stw	%r4,44(%r3)
    176 	mfdbatl	%r4,2
    177 	stw	%r4,48(%r3)
    178 	mfdbatu	%r4,2
    179 	stw	%r4,52(%r3)
    180 	mfdbatl	%r4,3
    181 	stw	%r4,56(%r3)
    182 	mfdbatu	%r4,3
    183 	stwu	%r4,60(%r3)
    184 
    185 	li	%r4,0			/* save SRs */
    186 1:
    187 	addis	%r4,%r4,-0x10000000@ha
    188 	or.	%r4,%r4,%r4
    189 	mfsrin	%r5,%r4
    190 	stwu	%r5,4(%r3)
    191 	bne	1b
    192 
    193 	mfsprg0	%r4			/* save SPRGs */
    194 	stw	%r4,4(%r3)
    195 	mfsprg1	%r4
    196 	stw	%r4,8(%r3)
    197 	mfsprg2	%r4
    198 	stw	%r4,12(%r3)
    199 	mfsprg3	%r4
    200 	stw	%r4,16(%r3)
    201 
    202 	mfsdr1	%r4			/* save SDR1 */
    203 	stw	%r4,20(%r3)
    204 
    205 	addi	%r4,%r3,24
    206 	mflr	%r11
    207 	li	%r3,EXC_DSI		/* save DSI/ISI trap vectors */
    208 	li	%r5,SI1SIZE
    209 	bl	copy
    210 
    211 	mtlr	%r11
    212 	li	%r3,EXC_IMISS		/* save MISS trap vectors */
    213 	li	%r5,SI2SIZE
    214 
    215 copy:
    216 	li	%r6,CACHELINE
    217 1:
    218 	lwz	%r7,0(%r3)
    219 	lwz	%r8,4(%r3)
    220 	lwz	%r9,8(%r3)
    221 	lwz	%r10,12(%r3)
    222 	stw	%r7,0(%r4)
    223 	stw	%r8,4(%r4)
    224 	stw	%r9,8(%r4)
    225 	stw	%r10,12(%r4)
    226 	lwz	%r7,16(%r3)
    227 	lwz	%r8,20(%r3)
    228 	lwz	%r9,24(%r3)
    229 	lwz	%r10,28(%r3)
    230 	stw	%r7,16(%r4)
    231 	stw	%r8,20(%r4)
    232 	stw	%r9,24(%r4)
    233 	stw	%r10,28(%r4)
    234 	dcbst	0,%r4
    235 	icbi	0,%r4
    236 	add	%r3,%r3,%r6
    237 	add	%r4,%r4,%r6
    238 	subf.	%r5,%r6,%r5
    239 	bgt	1b
    240 
    241 	dcbst	0,%r4
    242 	icbi	0,%r4
    243 
    244 	sync
    245 	isync
    246 
    247 	blr
    248 
    249 /*
    250  * Restore everything related to the mmu from the saveare pointed to by r3.
    251  */
    252 restoremmu:
    253 	mfmsr	%r12
    254 	andi.	%r4,%r12,~(PSL_IR|PSL_DR)@l
    255 	mtmsr	%r4			/* Disable MMU */
    256 	isync
    257 
    258 	li	%r4,0			/* first, invalidate BATs */
    259 	mtibatu	0,%r4
    260 	mtibatu	1,%r4
    261 	mtibatu	2,%r4
    262 	mtibatu	3,%r4
    263 	mtdbatu	0,%r4
    264 	mtdbatu	1,%r4
    265 	mtdbatu	2,%r4
    266 	mtdbatu	3,%r4
    267 
    268 	lwz	%r4,0(%r3)
    269 	mtibatl	0,%r4			/* restore BATs */
    270 	lwz	%r4,4(%r3)
    271 	mtibatu	0,%r4
    272 	lwz	%r4,8(%r3)
    273 	mtibatl	1,%r4
    274 	lwz	%r4,12(%r3)
    275 	mtibatu	1,%r4
    276 	lwz	%r4,16(%r3)
    277 	mtibatl	2,%r4
    278 	lwz	%r4,20(%r3)
    279 	mtibatu	2,%r4
    280 	lwz	%r4,24(%r3)
    281 	mtibatl	3,%r4
    282 	lwz	%r4,28(%r3)
    283 	mtibatu	3,%r4
    284 	lwz	%r4,32(%r3)
    285 	mtdbatl	0,%r4
    286 	lwz	%r4,36(%r3)
    287 	mtdbatu	0,%r4
    288 	lwz	%r4,40(%r3)
    289 	mtdbatl	1,%r4
    290 	lwz	%r4,44(%r3)
    291 	mtdbatu	1,%r4
    292 	lwz	%r4,48(%r3)
    293 	mtdbatl	2,%r4
    294 	lwz	%r4,52(%r3)
    295 	mtdbatu	2,%r4
    296 	lwz	%r4,56(%r3)
    297 	mtdbatl	3,%r4
    298 	lwzu	%r4,60(%r3)
    299 	mtdbatu	3,%r4
    300 
    301 	li	%r4,0			/* restore SRs */
    302 1:
    303 	lwzu	%r5,4(%r3)
    304 	addis	%r4,%r4,-0x10000000@ha
    305 	or.	%r4,%r4,%r4
    306 	mtsrin	%r5,%r4
    307 	bne	1b
    308 
    309 	lwz	%r4,4(%r3)
    310 	mtsprg0	%r4			/* restore SPRGs */
    311 	lwz	%r4,8(%r3)
    312 	mtsprg1	%r4
    313 	lwz	%r4,12(%r3)
    314 	mtsprg2	%r4
    315 	lwz	%r4,16(%r3)
    316 	mtsprg3	%r4
    317 
    318 	sync				/* remove everything from tlb */
    319 	lis	%r4,0x40000@ha
    320 	li	%r5,0x1000
    321 1:
    322 	subf.	%r4,%r5,%r4
    323 	tlbie	%r4
    324 	bne	1b
    325 
    326 	sync
    327 	tlbsync
    328 	sync
    329 
    330 	lwz	%r4,20(%r3)
    331 	sync
    332 	mtsdr1	%r4			/* restore SDR1 */
    333 
    334 	addi	%r3,%r3,24
    335 	mflr	%r11
    336 	li	%r4,EXC_DSI		/* restore DSI/ISI trap vectors */
    337 	li	%r5,SI1SIZE
    338 	bl	copy
    339 
    340 	li	%r4,EXC_IMISS		/* restore MISS trap vectors */
    341 	li	%r5,SI2SIZE
    342 	bl	copy
    343 
    344 	/* tlbia */
    345 	sync
    346 	li	%r3,0x40
    347 	mtctr	%r3
    348 	li	%r4,0
    349     1:
    350 	tlbie	%r4
    351 	addi	%r4,%r4,0x1000
    352 	bdnz	1b
    353 	sync
    354 	tlbsync
    355 	sync
    356 
    357 	mtmsr	%r12			/* restore MMU */
    358 	mtlr	%r11
    359 	blr
    360