| /src/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| debugfs_gt_pm.c | 310 u32 pm_ier, pm_imr, pm_isr, pm_iir, pm_mask; local in function:frequency_show
360 pm_iir = 0;
365 pm_iir = intel_uncore_read(uncore, GEN8_GT_IIR(2));
370 pm_iir = intel_uncore_read(uncore, GEN6_PMIIR);
386 pm_isr, pm_iir);
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| intel_rps_types.h | 40 * work, interrupts_enabled and pm_iir are protected by
46 u32 pm_iir; member in struct:intel_rps
|
| intel_rps.c | 121 rps->pm_iir = 0;
1416 static u32 vlv_wa_c0_ei(struct intel_rps *rps, u32 pm_iir)
1423 if ((pm_iir & GEN6_PM_RP_UP_EI_EXPIRED) == 0)
1462 u32 pm_iir = 0; local in function:rps_work
1465 pm_iir = fetch_and_zero(&rps->pm_iir);
1470 if ((pm_iir & rps->pm_events) == 0 && !client_boost)
1475 pm_iir |= vlv_wa_c0_ei(rps, pm_iir);
1486 } else if (pm_iir & GEN6_PM_RP_UP_THRESHOLD)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/ |
| i915_irq.c | 1537 u32 iir, gt_iir, pm_iir; local in function:valleyview_irq_handler
1543 pm_iir = I915_READ(GEN6_PMIIR);
1546 if (gt_iir == 0 && pm_iir == 0 && iir == 0)
1570 if (pm_iir)
1571 I915_WRITE(GEN6_PMIIR, pm_iir);
1596 if (pm_iir)
1597 gen6_rps_irq_handler(&dev_priv->gt.rps, pm_iir);
2102 u32 pm_iir = I915_READ(GEN6_PMIIR); local in function:ilk_irq_handler
2103 if (pm_iir) {
2104 I915_WRITE(GEN6_PMIIR, pm_iir);
[all...] |
| i915_debugfs.c | 854 u32 pm_ier, pm_imr, pm_isr, pm_iir, pm_mask; local in function:i915_frequency_info
904 pm_iir = 0;
909 pm_iir = I915_READ(GEN8_GT_IIR(2));
914 pm_iir = I915_READ(GEN6_PMIIR);
930 pm_isr, pm_iir);
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