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      1 /*	$NetBSD: sbus.c,v 1.106 2023/12/02 21:02:53 thorpej Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1999-2002 Eduardo Horvath
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. The name of the author may not be used to endorse or promote products
     16  *    derived from this software without specific prior written permission.
     17  *
     18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     23  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     24  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     25  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     26  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     28  * SUCH DAMAGE.
     29  */
     30 
     31 
     32 /*
     33  * Sbus stuff.
     34  */
     35 
     36 #include <sys/cdefs.h>
     37 __KERNEL_RCSID(0, "$NetBSD: sbus.c,v 1.106 2023/12/02 21:02:53 thorpej Exp $");
     38 
     39 #include "opt_ddb.h"
     40 
     41 #include <sys/param.h>
     42 #include <sys/malloc.h>
     43 #include <sys/kmem.h>
     44 #include <sys/systm.h>
     45 #include <sys/device.h>
     46 #include <sys/reboot.h>
     47 #include <sys/vmem.h>
     48 
     49 #include <sys/bus.h>
     50 #include <machine/openfirm.h>
     51 
     52 #include <sparc64/dev/iommureg.h>
     53 #include <sparc64/dev/iommuvar.h>
     54 #include <sparc64/dev/sbusreg.h>
     55 #include <dev/sbus/sbusvar.h>
     56 
     57 #include <uvm/uvm_extern.h>
     58 
     59 #include <machine/autoconf.h>
     60 #include <machine/cpu.h>
     61 #include <machine/sparc64.h>
     62 
     63 #ifdef DEBUG
     64 #define SDB_DVMA	0x1
     65 #define SDB_INTR	0x2
     66 int sbus_debug = 0;
     67 #define DPRINTF(l, s)   do { if (sbus_debug & l) printf s; } while (0)
     68 #else
     69 #define DPRINTF(l, s)
     70 #endif
     71 
     72 void sbusreset(int);
     73 
     74 static bus_dma_tag_t sbus_alloc_dmatag(struct sbus_softc *);
     75 static int sbus_get_intr(struct sbus_softc *, int, struct openprom_intr **,
     76 	int *, int);
     77 static int sbus_overtemp(void *);
     78 static int _sbus_bus_map(
     79 		bus_space_tag_t,
     80 		bus_addr_t,		/*offset*/
     81 		bus_size_t,		/*size*/
     82 		int,			/*flags*/
     83 		vaddr_t,		/* XXX unused -- compat w/sparc */
     84 		bus_space_handle_t *);
     85 static void *sbus_intr_establish(
     86 		bus_space_tag_t,
     87 		int,			/*`device class' priority*/
     88 		int,			/*Sbus interrupt level*/
     89 		int (*)(void *),	/*handler*/
     90 		void *,			/*handler arg*/
     91 		void (*)(void));	/*optional fast trap*/
     92 
     93 
     94 /* autoconfiguration driver */
     95 int	sbus_match(device_t, cfdata_t, void *);
     96 void	sbus_attach(device_t, device_t, void *);
     97 
     98 
     99 CFATTACH_DECL_NEW(sbus, sizeof(struct sbus_softc),
    100     sbus_match, sbus_attach, NULL, NULL);
    101 
    102 extern struct cfdriver sbus_cd;
    103 
    104 /*
    105  * DVMA routines
    106  */
    107 static int sbus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
    108 	bus_size_t, int, bus_dmamap_t *);
    109 
    110 /*
    111  * Child devices receive the Sbus interrupt level in their attach
    112  * arguments. We translate these to CPU IPLs using the following
    113  * tables. Note: obio bus interrupt levels are identical to the
    114  * processor IPL.
    115  *
    116  * The second set of tables is used when the Sbus interrupt level
    117  * cannot be had from the PROM as an `interrupt' property. We then
    118  * fall back on the `intr' property which contains the CPU IPL.
    119  */
    120 
    121 /*
    122  * This value is or'ed into the attach args' interrupt level cookie
    123  * if the interrupt level comes from an `intr' property, i.e. it is
    124  * not an Sbus interrupt level.
    125  */
    126 #define SBUS_INTR_COMPAT	0x80000000
    127 
    128 
    129 /*
    130  * Print the location of some sbus-attached device (called just
    131  * before attaching that device).  If `sbus' is not NULL, the
    132  * device was found but not configured; print the sbus as well.
    133  * Return UNCONF (config_find ignores this if the device was configured).
    134  */
    135 int
    136 sbus_print(void *args, const char *busname)
    137 {
    138 	struct sbus_attach_args *sa = args;
    139 	int i;
    140 
    141 	if (busname)
    142 		aprint_normal("%s at %s", sa->sa_name, busname);
    143 	aprint_normal(" slot %ld offset 0x%lx", (long)sa->sa_slot,
    144 	       (u_long)sa->sa_offset);
    145 	for (i = 0; i < sa->sa_nintr; i++) {
    146 		struct openprom_intr *sbi = &sa->sa_intr[i];
    147 
    148 		aprint_normal(" vector %lx ipl %ld",
    149 		       (u_long)sbi->oi_vec,
    150 		       (long)INTLEV(sbi->oi_pri));
    151 	}
    152 	return (UNCONF);
    153 }
    154 
    155 int
    156 sbus_match(device_t parent, cfdata_t cf, void *aux)
    157 {
    158 	struct mainbus_attach_args *ma = aux;
    159 
    160 	return (strcmp(cf->cf_name, ma->ma_name) == 0);
    161 }
    162 
    163 /*
    164  * Attach an Sbus.
    165  */
    166 void
    167 sbus_attach(device_t parent, device_t self, void *aux)
    168 {
    169 	struct sbus_softc *sc = device_private(self);
    170 	struct mainbus_attach_args *ma = aux;
    171 	struct intrhand *ih;
    172 	int ipl;
    173 	char *name;
    174 	int node = ma->ma_node;
    175 	int node0, error;
    176 	bus_space_tag_t sbt;
    177 	struct sbus_attach_args sa;
    178 
    179 	sc->sc_dev = self;
    180 	sc->sc_bustag = ma->ma_bustag;
    181 	sc->sc_dmatag = ma->ma_dmatag;
    182 	sc->sc_ign = ma->ma_interrupts[0] & INTMAP_IGN;
    183 
    184 	/* XXXX Use sysio PROM mappings for interrupt vector regs. */
    185 	sparc_promaddr_to_handle(sc->sc_bustag,	ma->ma_address[0], &sc->sc_bh);
    186 	sc->sc_sysio = (struct sysioreg *)bus_space_vaddr(sc->sc_bustag,
    187 		sc->sc_bh);
    188 
    189 #ifdef _LP64
    190 	/*
    191 	 * 32-bit kernels use virtual addresses for bus space operations
    192 	 * so we may as well use the prom VA.
    193 	 *
    194 	 * 64-bit kernels use physical addresses for bus space operations
    195 	 * so mapping this in again will reduce TLB thrashing.
    196 	 */
    197 	if (bus_space_map(sc->sc_bustag, ma->ma_reg[0].ur_paddr,
    198 		ma->ma_reg[0].ur_len, 0, &sc->sc_bh) != 0) {
    199 		aprint_error_dev(self, "cannot map registers\n");
    200 		return;
    201 	}
    202 #endif
    203 
    204 	/*
    205 	 * Record clock frequency for synchronous SCSI.
    206 	 * IS THIS THE CORRECT DEFAULT??
    207 	 */
    208 	sc->sc_clockfreq = prom_getpropint(node, "clock-frequency",
    209 		25*1000*1000);
    210 	printf(": clock = %s MHz\n", clockfreq(sc->sc_clockfreq));
    211 
    212 	sbt = bus_space_tag_alloc(sc->sc_bustag, sc);
    213 	sbt->type = SBUS_BUS_SPACE;
    214 	sbt->sparc_bus_map = _sbus_bus_map;
    215 	sbt->sparc_intr_establish = sbus_intr_establish;
    216 
    217 	sc->sc_dmatag = sbus_alloc_dmatag(sc);
    218 
    219 	/*
    220 	 * Get the SBus burst transfer size if burst transfers are supported
    221 	 */
    222 	sc->sc_burst = prom_getpropint(node, "burst-sizes", 0);
    223 
    224 	/*
    225 	 * Collect address translations from the OBP.
    226 	 */
    227 	error = prom_getprop(node, "ranges", sizeof(struct openprom_range),
    228 			 &sbt->nranges, &sbt->ranges);
    229 	if (error)
    230 		panic("%s: error getting ranges property", device_xname(self));
    231 
    232 	/* initialize the IOMMU */
    233 
    234 	/* punch in our copies */
    235 	sc->sc_is.is_bustag = sc->sc_bustag;
    236 	bus_space_subregion(sc->sc_bustag, sc->sc_bh,
    237 		(vaddr_t)&((struct sysioreg *)NULL)->sys_iommu,
    238 		sizeof (struct iommureg), &sc->sc_is.is_iommu);
    239 
    240 	/* initialize our strbuf_ctl */
    241 	sc->sc_is.is_sb[0] = &sc->sc_sb;
    242 	sc->sc_sb.sb_is = &sc->sc_is;
    243 	bus_space_subregion(sc->sc_bustag, sc->sc_bh,
    244 		(vaddr_t)&((struct sysioreg *)NULL)->sys_strbuf,
    245 		sizeof (struct iommu_strbuf), &sc->sc_sb.sb_sb);
    246 	/* Point sb_flush to our flush buffer. */
    247 	sc->sc_sb.sb_flush = &sc->sc_flush;
    248 
    249 	/* give us a nice name.. */
    250 	name = kmem_asprintf("%s dvma", device_xname(self));
    251 
    252 	iommu_init(name, &sc->sc_is, 0, -1);
    253 
    254 	/* Enable the over temp intr */
    255 	ih = intrhand_alloc();
    256 	ih->ih_map = &sc->sc_sysio->therm_int_map;
    257 	ih->ih_clr = NULL; /* &sc->sc_sysio->therm_clr_int; */
    258 	ih->ih_fun = sbus_overtemp;
    259 	ipl = 1;
    260 	ih->ih_pil = ipl;
    261 	ih->ih_number = INTVEC(*(ih->ih_map));
    262 	ih->ih_pending = 0;
    263 	intr_establish(ipl, true, ih);
    264 	*(ih->ih_map) |= INTMAP_V|(CPU_UPAID << INTMAP_TID_SHIFT);
    265 
    266 	/*
    267 	 * Note: the stupid SBUS IOMMU ignores the high bits of an address, so a
    268 	 * NULL DMA pointer will be translated by the first page of the IOTSB.
    269 	 * To avoid bugs we'll alloc and ignore the first entry in the IOTSB.
    270 	 */
    271 	if (vmem_xalloc_addr(sc->sc_is.is_dvmamap, sc->sc_is.is_dvmabase,
    272 			    PAGE_SIZE, VM_NOSLEEP) != 0) {
    273 		panic("sbus iommu: can't toss first dvma page");
    274 	}
    275 
    276 	/*
    277 	 * Loop through ROM children, fixing any relative addresses
    278 	 * and then configuring each device.
    279 	 * `specials' is an array of device names that are treated
    280 	 * specially:
    281 	 */
    282 	devhandle_t selfh = device_handle(self);
    283 	node0 = OF_child(node);
    284 	for (node = node0; node; node = OF_peer(node)) {
    285 		char *name1 = prom_getpropstring(node, "name");
    286 
    287 		if (sbus_setup_attach_args(sc, sbt, sc->sc_dmatag,
    288 					   node, &sa) != 0) {
    289 			printf("sbus_attach: %s: incomplete\n", name1);
    290 			continue;
    291 		}
    292 		(void) config_found(self, &sa, sbus_print,
    293 		    CFARGS(.devhandle = prom_node_to_devhandle(selfh, node)));
    294 		sbus_destroy_attach_args(&sa);
    295 	}
    296 }
    297 
    298 int
    299 sbus_setup_attach_args(struct sbus_softc *sc, bus_space_tag_t bustag,
    300 	bus_dma_tag_t dmatag, int node, struct sbus_attach_args	*sa)
    301 {
    302 	/*struct	openprom_addr sbusreg;*/
    303 	/*int	base;*/
    304 	int	error;
    305 	int n;
    306 
    307 	memset(sa, 0, sizeof(struct sbus_attach_args));
    308 	n = 0;
    309 	error = prom_getprop(node, "name", 1, &n, &sa->sa_name);
    310 	if (error != 0)
    311 		return (error);
    312 	KASSERT(sa->sa_name[n-1] == '\0');
    313 
    314 	sa->sa_bustag = bustag;
    315 	sa->sa_dmatag = dmatag;
    316 	sa->sa_node = node;
    317 	sa->sa_frequency = sc->sc_clockfreq;
    318 
    319 	error = prom_getprop(node, "reg", sizeof(struct openprom_addr),
    320 			 &sa->sa_nreg, &sa->sa_reg);
    321 	if (error != 0) {
    322 		char buf[32];
    323 		if (error != ENOENT ||
    324 		    !node_has_property(node, "device_type") ||
    325 		    strcmp(prom_getpropstringA(node, "device_type", buf, sizeof buf),
    326 			   "hierarchical") != 0)
    327 			return (error);
    328 	}
    329 	for (n = 0; n < sa->sa_nreg; n++) {
    330 		/* Convert to relative addressing, if necessary */
    331 		uint32_t base = sa->sa_reg[n].oa_base;
    332 		if (SBUS_ABS(base)) {
    333 			sa->sa_reg[n].oa_space = SBUS_ABS_TO_SLOT(base);
    334 			sa->sa_reg[n].oa_base = SBUS_ABS_TO_OFFSET(base);
    335 		}
    336 	}
    337 
    338 	if ((error = sbus_get_intr(sc, node, &sa->sa_intr, &sa->sa_nintr,
    339 	    sa->sa_slot)) != 0)
    340 		return (error);
    341 
    342 	error = prom_getprop(node, "address", sizeof(uint32_t),
    343 			 &sa->sa_npromvaddrs, &sa->sa_promvaddrs);
    344 	if (error != 0 && error != ENOENT)
    345 		return (error);
    346 
    347 	return (0);
    348 }
    349 
    350 void
    351 sbus_destroy_attach_args(struct sbus_attach_args *sa)
    352 {
    353 	if (sa->sa_name != NULL)
    354 		free(sa->sa_name, M_DEVBUF);
    355 
    356 	if (sa->sa_nreg != 0)
    357 		free(sa->sa_reg, M_DEVBUF);
    358 
    359 	if (sa->sa_intr)
    360 		free(sa->sa_intr, M_DEVBUF);
    361 
    362 	if (sa->sa_promvaddrs)
    363 		free((void *)sa->sa_promvaddrs, M_DEVBUF);
    364 
    365 	memset(sa, 0, sizeof(struct sbus_attach_args)); /*DEBUG*/
    366 }
    367 
    368 
    369 int
    370 _sbus_bus_map(bus_space_tag_t t, bus_addr_t addr, bus_size_t size, int flags,
    371 	vaddr_t v, bus_space_handle_t *hp)
    372 {
    373 	int error;
    374 
    375 	if (t->ranges != NULL) {
    376 		if ((error = bus_space_translate_address_generic(
    377 				t->ranges, t->nranges, &addr)) != 0)
    378 			return (error);
    379 	}
    380 
    381 	/*
    382 	 * BUS_SPACE_MAP_PREFETCHABLE doesn't work right through sbus, so weed
    383 	 * it out for now until we know better
    384 	 */
    385 
    386 	flags &= ~BUS_SPACE_MAP_PREFETCHABLE;
    387 
    388 	return (bus_space_map(t->parent, addr, size, flags, hp));
    389 }
    390 
    391 
    392 bus_addr_t
    393 sbus_bus_addr(bus_space_tag_t t, u_int btype, u_int offset)
    394 {
    395 	int slot = btype;
    396 	struct openprom_range *rp;
    397 	int i;
    398 
    399 	for (i = 0; i < t->nranges; i++) {
    400 		rp = &t->ranges[i];
    401 		if (rp->or_child_space != slot)
    402 			continue;
    403 
    404 		return BUS_ADDR(rp->or_parent_space,
    405 				rp->or_parent_base + offset);
    406 	}
    407 
    408 	return (0);
    409 }
    410 
    411 
    412 /*
    413  * Handle an overtemp situation.
    414  *
    415  * SPARCs have temperature sensors which generate interrupts
    416  * if the machine's temperature exceeds a certain threshold.
    417  * This handles the interrupt and powers off the machine.
    418  * The same needs to be done to PCI controller drivers.
    419  */
    420 int
    421 sbus_overtemp(void *arg)
    422 {
    423 	/* Should try a clean shutdown first */
    424 	printf("DANGER: OVER TEMPERATURE detected\nShutting down...\n");
    425 	delay(20);
    426 	kern_reboot(RB_POWERDOWN|RB_HALT, NULL);
    427 }
    428 
    429 /*
    430  * Get interrupt attributes for an Sbus device.
    431  */
    432 int
    433 sbus_get_intr(struct sbus_softc *sc, int node, struct openprom_intr **ipp,
    434 	int *np, int slot)
    435 {
    436 	int *ipl;
    437 	int n, i;
    438 	char buf[32];
    439 
    440 	/*
    441 	 * The `interrupts' property contains the Sbus interrupt level.
    442 	 */
    443 	ipl = NULL;
    444 	if (prom_getprop(node, "interrupts", sizeof(int), np, &ipl) == 0) {
    445 		struct openprom_intr *ip;
    446 		int pri;
    447 
    448 		/* Default to interrupt level 2 -- otherwise unused */
    449 		pri = INTLEVENCODE(2);
    450 
    451 		/* Change format to an `struct sbus_intr' array */
    452 		ip = malloc(*np * sizeof(struct openprom_intr), M_DEVBUF,
    453 		    M_WAITOK);
    454 
    455 		/*
    456 		 * Now things get ugly.  We need to take this value which is
    457 		 * the interrupt vector number and encode the IPL into it
    458 		 * somehow. Luckily, the interrupt vector has lots of free
    459 		 * space and we can easily stuff the IPL in there for a while.
    460 		 */
    461 		prom_getpropstringA(node, "device_type", buf, sizeof buf);
    462 		if (buf[0] == '\0')
    463 			prom_getpropstringA(node, "name", buf, sizeof buf);
    464 
    465 		for (i = 0; intrmap[i].in_class; i++)
    466 			if (strcmp(intrmap[i].in_class, buf) == 0) {
    467 				pri = INTLEVENCODE(intrmap[i].in_lev);
    468 				break;
    469 			}
    470 
    471 		/*
    472 		 * Sbus card devices need the slot number encoded into
    473 		 * the vector as this is generally not done.
    474 		 */
    475 		if ((ipl[0] & INTMAP_OBIO) == 0)
    476 			pri |= slot << 3;
    477 
    478 		for (n = 0; n < *np; n++) {
    479 			/*
    480 			 * We encode vector and priority into sbi_pri so we
    481 			 * can pass them as a unit.  This will go away if
    482 			 * sbus_establish ever takes an sbus_intr instead
    483 			 * of an integer level.
    484 			 * Stuff the real vector in sbi_vec.
    485 			 */
    486 
    487 			ip[n].oi_pri = pri|ipl[n];
    488 			ip[n].oi_vec = ipl[n];
    489 		}
    490 		free(ipl, M_DEVBUF);
    491 		*ipp = ip;
    492 	}
    493 
    494 	return (0);
    495 }
    496 
    497 
    498 /*
    499  * Install an interrupt handler for an Sbus device.
    500  */
    501 void *
    502 sbus_intr_establish(bus_space_tag_t t, int pri, int level,
    503 	int (*handler)(void *), void *arg, void (*fastvec)(void))
    504 {
    505 	struct sbus_softc *sc = t->cookie;
    506 	struct intrhand *ih;
    507 	int ipl;
    508 	long vec = pri;
    509 
    510 	ih = intrhand_alloc();
    511 
    512 	if ((vec & SBUS_INTR_COMPAT) != 0)
    513 		ipl = vec & ~SBUS_INTR_COMPAT;
    514 	else {
    515 		/* Decode and remove IPL */
    516 		ipl = INTLEV(vec);
    517 		vec = INTVEC(vec);
    518 		DPRINTF(SDB_INTR,
    519 		    ("\nsbus: intr[%ld]%lx: %lx\nHunting for IRQ...\n",
    520 		    (long)ipl, (long)vec, (u_long)intrlev[vec]));
    521 		if ((vec & INTMAP_OBIO) == 0) {
    522 			/* We're in an SBUS slot */
    523 			/* Register the map and clear intr registers */
    524 
    525 			int slot = INTSLOT(pri);
    526 
    527 			ih->ih_map = &(&sc->sc_sysio->sbus_slot0_int)[slot];
    528 			ih->ih_clr = &sc->sc_sysio->sbus0_clr_int[vec];
    529 #ifdef DEBUG
    530 			if (sbus_debug & SDB_INTR) {
    531 				int64_t imap = *ih->ih_map;
    532 
    533 				printf("SBUS %lx IRQ as %llx in slot %d\n",
    534 				       (long)vec, (long long)imap, slot);
    535 				printf("\tmap addr %p clr addr %p\n",
    536 				    ih->ih_map, ih->ih_clr);
    537 			}
    538 #endif
    539 			/* Enable the interrupt */
    540 			vec |= INTMAP_V | sc->sc_ign |
    541 				(CPU_UPAID << INTMAP_TID_SHIFT);
    542 			*(ih->ih_map) = vec;
    543 		} else {
    544 			int64_t *intrptr = &sc->sc_sysio->scsi_int_map;
    545 			int64_t imap = 0;
    546 			int i;
    547 
    548 			/* Insert IGN */
    549 			vec |= sc->sc_ign;
    550 			for (i = 0; &intrptr[i] <=
    551 			    (int64_t *)&sc->sc_sysio->reserved_int_map &&
    552 			    INTVEC(imap = intrptr[i]) != INTVEC(vec); i++)
    553 				;
    554 			if (INTVEC(imap) == INTVEC(vec)) {
    555 				DPRINTF(SDB_INTR,
    556 				    ("OBIO %lx IRQ as %lx in slot %d\n",
    557 				    vec, (long)imap, i));
    558 				/* Register the map and clear intr registers */
    559 				ih->ih_map = &intrptr[i];
    560 				intrptr = (int64_t *)&sc->sc_sysio->scsi_clr_int;
    561 				ih->ih_clr = &intrptr[i];
    562 				/* Enable the interrupt */
    563 				imap |= INTMAP_V
    564 				    |(CPU_UPAID << INTMAP_TID_SHIFT);
    565 				/* XXXX */
    566 				*(ih->ih_map) = imap;
    567 			} else
    568 				panic("IRQ not found!");
    569 		}
    570 	}
    571 #ifdef DEBUG
    572 	if (sbus_debug & SDB_INTR) { long i; for (i = 0; i < 400000000; i++); }
    573 #endif
    574 
    575 	ih->ih_fun = handler;
    576 	ih->ih_arg = arg;
    577 	ih->ih_number = vec;
    578 	ih->ih_ivec = 0;
    579 	ih->ih_pil = ipl;
    580 	ih->ih_pending = 0;
    581 
    582 	intr_establish(ipl, level != IPL_VM, ih);
    583 	return (ih);
    584 }
    585 
    586 static bus_dma_tag_t
    587 sbus_alloc_dmatag(struct sbus_softc *sc)
    588 {
    589 	bus_dma_tag_t sdt, psdt = sc->sc_dmatag;
    590 
    591 	sdt = kmem_alloc(sizeof(*sdt), KM_SLEEP);
    592 	sdt->_cookie = sc;
    593 	sdt->_parent = psdt;
    594 #define PCOPY(x)	sdt->x = psdt->x
    595 	sdt->_dmamap_create = sbus_dmamap_create;
    596 	PCOPY(_dmamap_destroy);
    597 	sdt->_dmamap_load = iommu_dvmamap_load;
    598 	PCOPY(_dmamap_load_mbuf);
    599 	PCOPY(_dmamap_load_uio);
    600 	sdt->_dmamap_load_raw = iommu_dvmamap_load_raw;
    601 	sdt->_dmamap_unload = iommu_dvmamap_unload;
    602 	sdt->_dmamap_sync = iommu_dvmamap_sync;
    603 	sdt->_dmamem_alloc = iommu_dvmamem_alloc;
    604 	sdt->_dmamem_free = iommu_dvmamem_free;
    605 	sdt->_dmamem_map = iommu_dvmamem_map;
    606 	sdt->_dmamem_unmap = iommu_dvmamem_unmap;
    607 	PCOPY(_dmamem_mmap);
    608 #undef	PCOPY
    609 	sc->sc_dmatag = sdt;
    610 	return (sdt);
    611 }
    612 
    613 static int
    614 sbus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
    615 	bus_size_t maxsegsz, bus_size_t boundary, int flags,
    616 	bus_dmamap_t *dmamp)
    617 {
    618 	struct sbus_softc *sc = t->_cookie;
    619 	int error;
    620 
    621 	error = bus_dmamap_create(t->_parent, size, nsegments, maxsegsz,
    622 				  boundary, flags, dmamp);
    623 	if (error == 0)
    624 		(*dmamp)->_dm_cookie = &sc->sc_sb;
    625 	return error;
    626 }
    627