| /src/sys/arch/arm/amlogic/ |
| meson_clk_div.c | 86 uint32_t val, raw_div; local in function:meson_clk_div_set_rate
120 raw_div = (ratio > 0) ? ratio - 1 : 0;
122 if (raw_div > __SHIFTOUT_MASK(div->div)) {
128 val |= __SHIFTIN(raw_div, div->div);
|
| /src/sys/arch/arm/sunxi/ |
| sunxi_ccu_div.c | 140 uint32_t val, raw_div; local in function:sunxi_ccu_div_set_rate
167 raw_div = ratio >> 1;
171 raw_div = (ratio > 0 ) ? ratio - 1 : 0;
173 if (raw_div > __SHIFTOUT_MASK(div->div))
177 val |= __SHIFTIN(raw_div, div->div);
|
| /src/sys/arch/arm/nvidia/ |
| tegra124_car.c | 1222 tegra124_car_clock_calc_rate_frac_div(u_int rate, u_int raw_div)
1224 raw_div += 2;
1226 rate += raw_div - 1;
1227 rate /= raw_div;
1247 const u_int raw_div = __SHIFTOUT(v, tdiv->bits); local in function:tegra124_car_clock_get_rate_div
1256 rate = parent_rate * 1 / (raw_div + 1);
1264 parent_rate, raw_div);
1271 raw_div);
1286 u_int raw_div; local in function:tegra124_car_clock_set_rate_div
1298 raw_div = __SHIFTOUT(tdiv->bits, tdiv->bits)
[all...] |
| tegra210_car.c | 1343 u_int raw_div = __SHIFTOUT(v, tdiv->bits); local in function:tegra210_car_clock_get_rate_div
1352 rate = parent_rate / (raw_div + 1);
1359 rate = parent_rate / ((raw_div / 2) + 1);
1370 raw_div = 0; /* ignore divisor for _LJ options */
1375 rate = parent_rate / ((raw_div / 2) + 1);
1390 u_int raw_div; local in function:tegra210_car_clock_set_rate_div
1402 raw_div = __SHIFTOUT(tdiv->bits, tdiv->bits);
1413 raw_div = (parent_rate / rate) * 2;
1414 if (raw_div >= 2)
1415 raw_div -= 2
[all...] |
