| /src/sys/arch/mips/atheros/ |
| ar9344.c | 125 uint32_t ref_clk; local in function:ar9344_get_freqs
129 ref_clk = 40 * 1000000;
131 ref_clk = 25 * 1000000;
134 freqs->freq_ref = ref_clk;
145 const uint32_t cpu_pll_freq = (nint * ref_clk / ref_div) >> out_div;
156 const uint32_t ddr_pll_freq = (nint * ref_clk / ref_div) >> out_div;
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| dcn20_link_encoder.h | 272 uint32_t ref_clk; member in struct:mpll_cfg
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| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| vlv_dsi_pll.c | 68 int delta, ref_clk; local in function:dsi_calc_mnp
77 ref_clk = 100000;
82 ref_clk = 25000;
90 delta = abs(target_dsi_clk - (m_min * ref_clk) / (p_min * n));
98 int calc_dsi_clk = (m * ref_clk) / (p * n);
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| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| da850.dtsi | 82 ref_clk: ref_clk { label in label:clocks
85 clock-output-names = "ref_clk";
138 clocks = <&ref_clk>, <&pll1_sysclk 3>;
698 clocks = <&ref_clk>;
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| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
| amdgpu_vegam_smumgr.c | 675 uint32_t i, ref_clk; local in function:vegam_get_sclk_range_table
679 ref_clk = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);
704 (ref_clk * Range_Table[i].fcw_trans_lower) >> Range_Table[i].postdiv;
706 (ref_clk * Range_Table[i].fcw_trans_upper) >> Range_Table[i].postdiv;
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| amdgpu_polaris10_smumgr.c | 807 uint32_t i, ref_clk; local in function:polaris10_get_sclk_range_table
811 ref_clk = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);
830 smu_data->range_table[i].trans_lower_frequency = (ref_clk * Range_Table[i].fcw_trans_lower) >> Range_Table[i].postdiv;
831 smu_data->range_table[i].trans_upper_frequency = (ref_clk * Range_Table[i].fcw_trans_upper) >> Range_Table[i].postdiv;
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| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_cypress_dpm.c | 449 u32 ref_clk = rdev->clock.mpll.reference_freq; local in function:cypress_map_clkf_to_ibias
450 u32 vco = clkf * ref_clk;
453 if (ref_clk == 10000) {
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| radeon_rv6xx_dpm.c | 168 u32 ref_clk = rdev->clock.spll.reference_freq; local in function:rv6xx_output_stepping
188 fb_divider = ((step->vco_frequency * pi->spll_ref_div) / ref_clk) >>
433 u32 ref_clk = rdev->clock.spll.reference_freq; local in function:rv6xx_compute_count_for_delay
435 return rv6xx_scale_count_given_unit(rdev, delay_us * (ref_clk / 100), unit);
556 u32 ref_clk = rdev->clock.spll.reference_freq; local in function:rv6xx_program_engine_spread_spectrum
566 vco_freq = rv6xx_calculate_vco_frequency(ref_clk, ÷rs,
572 (ref_clk / (dividers.ref_div + 1)),
578 (ref_clk / (dividers.ref_div + 1)));
637 u32 ref_clk,
647 vco_freq_temp = rv6xx_calculate_vco_frequency(ref_clk, &req_dividers
660 u32 ref_clk = rdev->clock.mpll.reference_freq; local in function:rv6xx_program_mclk_spread_spectrum_parameters
845 u32 ref_clk = rdev->clock.spll.reference_freq; local in function:rv6xx_program_bsp
[all...] |
| /src/sys/arch/arm/sociox/ |
| if_scx.c | 700 long ref_clk; local in function:scx_fdt_attach
724 ref_clk = get_clk_freq(phandle, "phy_ref_clk");
725 if (ref_clk == -1)
726 ref_clk = 250 * 1000 * 1000;
732 phy_mode, (int)phy_id, ref_clk);
754 sc->sc_freq = ref_clk;
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