| /src/sys/arch/arm/rockchip/ |
| rk3399_pmucru.c | 187 const u_int refdiv = __SHIFTOUT(con1, PLL_REFDIV); local in function:rk3399_pmucru_pll_get_rate
193 foutvco = fref / refdiv * fbdiv;
196 foutvco = fref / refdiv * fbdiv + ((fref * fracdiv) >> 24);
235 __SHIFTIN(pll_rate->refdiv, PLL_REFDIV) |
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| rk_cru_pll.c | 139 const u_int refdiv = __SHIFTOUT(con1, PLL_REFDIV); local in function:rk_cru_pll_get_rate
145 foutvco = fref / refdiv * fbdiv;
148 foutvco = fref / refdiv * fbdiv + ((fref * fracdiv) >> 24);
243 __SHIFTIN(pll_rate->refdiv, PLL_REFDIV) |
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| rk3399_cru.c | 259 const u_int refdiv = __SHIFTOUT(con1, PLL_REFDIV); local in function:rk3399_cru_pll_get_rate
265 foutvco = fref / refdiv * fbdiv;
268 foutvco = fref / refdiv * fbdiv + ((fref * fracdiv) >> 24);
312 __SHIFTIN(pll_rate->refdiv, PLL_REFDIV) |
|
| rk_cru.h | 57 u_int refdiv; member in struct:rk_cru_pll_rate::__anonf247ef35010a::__anonf247ef350208
76 .refdiv = (_refdiv), \
|
| /src/sys/arch/mips/atheros/ |
| ar5315.c | 169 const uint32_t refdiv = pre_divide_table[AR5315_PLLC_REF_DIV(pllc)]; local in function:ar5315_get_freqs
176 freqs->freq_pll = (freqs->freq_ref / refdiv) * div2 * fbdiv;
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| /src/sys/dev/pci/ |
| radeonfb.c | 646 aprint_verbose("%s: refclk = %d.%03d MHz, refdiv = %d "
1621 int refdiv = 0; local in function:radeonfb_getclocks
1627 refdiv = radeonfb_getprop_num(sc, "refdiv", 0) & 0xffff;
1640 if (refclk && refdiv && minpll && maxpll)
1651 refdiv = refdiv ? refdiv : 12;
1672 if (refdiv < 2)
1673 refdiv = GETPLL(sc, RADEON_PPLL_REF_DIV)
2144 uint32_t data, refdiv, div0, r2xxref; local in function:radeonfb_program_vclk
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_mode.h | 376 uint8_t refdiv; member in struct:amdgpu_atom_ss
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| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_mode.h | 317 uint8_t refdiv; member in struct:radeon_atom_ss
|
