| /src/sys/external/bsd/sljit/dist/sljit_src/ |
| sljitNativeARM_32.c | 59 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable in typeref:typename:const sljit_u8[]
63 #define RM(rm) (reg_map[rm])
64 #define RD(rd) (reg_map[rd] << 12)
65 #define RN(rn) (reg_map[rn] << 16)
862 (data_transfer_insts[(type) & 0xf] | ((add) << 23) | ((wb) << (21 - 4)) | (reg_map[target_reg] << 12) | (reg_map[base_reg] << 16) | (arg))
897 push |= 1 << reg_map[i];
900 push |= 1 << reg_map[i];
955 pop |= 1 << reg_map[i];
958 pop |= 1 << reg_map[i]
[all...] |
| sljitNativeARM_T2_32.c | 46 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable in typeref:typename:const sljit_u8[]
54 #define RD3(rd) (reg_map[rd])
55 #define RN3(rn) (reg_map[rn] << 3)
56 #define RM3(rm) (reg_map[rm] << 6)
57 #define RDN3(rdn) (reg_map[rdn] << 8)
63 ((reg_map[rn] << 3) | (reg_map[rd] & 0x7) | ((reg_map[rd] & 0x8) << 4))
65 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7
[all...] |
| sljitNativePPC_common.c | 110 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 7] = { variable in typeref:typename:const sljit_u8[]
117 #define D(d) (reg_map[d] << 21)
118 #define S(s) (reg_map[s] << 21)
119 #define A(a) (reg_map[a] << 16)
120 #define B(b) (reg_map[b] << 11)
121 #define C(c) (reg_map[c] << 6)
1680 return reg_map[reg];
|
| sljitNativeSPARC_common.c | 100 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable in typeref:typename:const sljit_u8[]
108 #define D(d) (reg_map[d] << 25)
110 #define S1(s1) (reg_map[s1] << 14)
111 #define S2(s2) (reg_map[s2])
118 #define DR(dr) (reg_map[dr])
936 return reg_map[reg];
|
| sljitNativeX86_common.c | 71 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 3] = { variable in typeref:typename:const sljit_u8[]
97 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable in typeref:typename:const sljit_u8[]
100 /* low-map. reg_map & 0x7. */
106 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable in typeref:typename:const sljit_u8[]
109 /* low-map. reg_map & 0x7. */
663 return emit_do_imm(compiler, MOV_r_i32 + reg_map[dst], srcw);
670 return emit_do_imm32(compiler, (reg_map[dst] >= 8) ? REX_B : 0, MOV_r_i32 + reg_lmap[dst], srcw);
736 reg_map[SLJIT_R0] == 0
737 && reg_map[SLJIT_R1] == 2
738 && reg_map[TMP_REG1] > 7)
[all...] |
| sljitNativeARM_64.c | 48 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 8] = { variable in typeref:typename:const sljit_u8[]
53 #define RD(rd) (reg_map[rd])
54 #define RT(rt) (reg_map[rt])
55 #define RN(rn) (reg_map[rn] << 5)
56 #define RT2(rt2) (reg_map[rt2] << 10)
57 #define RM(rm) (reg_map[rm] << 16)
1526 return reg_map[reg];
|
| sljitNativeMIPS_common.c | 68 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable in typeref:typename:const sljit_u8[]
76 #define S(s) (reg_map[s] << 21)
77 #define T(t) (reg_map[t] << 16)
78 #define D(d) (reg_map[d] << 11)
89 #define DR(dr) (reg_map[dr])
1233 return reg_map[reg];
|
| sljitNativeTILEGX_64.c | 54 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable in typeref:typename:const sljit_u8[]
1165 FAIL_IF(ADDLI_SOLO(reg_map[dst_ar], ZERO, imm >> 48));
1166 FAIL_IF(SHL16INSLI_SOLO(reg_map[dst_ar], reg_map[dst_ar], imm >> 32));
1167 FAIL_IF(SHL16INSLI_SOLO(reg_map[dst_ar], reg_map[dst_ar], imm >> 16));
1168 return SHL16INSLI_SOLO(reg_map[dst_ar], reg_map[dst_ar], imm);
1171 FAIL_IF(ADDLI(reg_map[dst_ar], ZERO, imm >> 48));
1172 FAIL_IF(SHL16INSLI(reg_map[dst_ar], reg_map[dst_ar], imm >> 32))
[all...] |
