1 /* $NetBSD: rk_anxdp.c,v 1.6 2021/12/19 12:43:37 riastradh Exp $ */ 2 3 /*- 4 * Copyright (c) 2019 Jonathan A. Kollasch <jakllsch (at) kollasch.net> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: rk_anxdp.c,v 1.6 2021/12/19 12:43:37 riastradh Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/device.h> 35 #include <sys/intr.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/conf.h> 39 40 #include <drm/drm_drv.h> 41 #include <drm/drm_crtc_helper.h> 42 43 #include <dev/fdt/fdtvar.h> 44 #include <dev/fdt/fdt_port.h> 45 #include <dev/fdt/syscon.h> 46 47 #include <dev/ic/anx_dp.h> 48 49 #define RK3399_GRF_SOC_CON20 0x6250 50 #define EDP_LCDC_SEL __BIT(5) 51 52 enum { 53 ANXDP_PORT_INPUT = 0, 54 ANXDP_PORT_OUTPUT = 1, 55 }; 56 57 static const struct device_compatible_entry compat_data[] = { 58 { .compat = "rockchip,rk3399-edp" }, 59 DEVICE_COMPAT_EOL 60 }; 61 62 struct rk_anxdp_softc { 63 struct anxdp_softc sc_base; 64 int sc_phandle; 65 66 struct fdt_device_ports sc_ports; 67 struct drm_encoder sc_encoder; 68 struct drm_display_mode sc_curmode; 69 struct syscon *sc_grf; 70 71 bool sc_activated; 72 }; 73 74 #define to_rk_anxdp_softc(x) container_of(x, struct rk_anxdp_softc, sc_base) 75 #define to_rk_anxdp_encoder(x) container_of(x, struct rk_anxdp_softc, sc_encoder) 76 77 static void 78 rk_anxdp_select_input(struct rk_anxdp_softc *sc, u_int crtc_index) 79 { 80 const uint32_t write_mask = EDP_LCDC_SEL << 16; 81 const uint32_t write_val = crtc_index == 0 ? EDP_LCDC_SEL : 0; 82 83 syscon_lock(sc->sc_grf); 84 syscon_write_4(sc->sc_grf, RK3399_GRF_SOC_CON20, write_mask | write_val); 85 syscon_unlock(sc->sc_grf); 86 } 87 88 static bool 89 rk_anxdp_encoder_mode_fixup(struct drm_encoder *encoder, 90 const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) 91 { 92 return true; 93 } 94 95 static void 96 rk_anxdp_encoder_mode_set(struct drm_encoder *encoder, 97 struct drm_display_mode *mode, struct drm_display_mode *adjusted) 98 { 99 } 100 101 static void 102 rk_anxdp_encoder_enable(struct drm_encoder *encoder) 103 { 104 } 105 106 static void 107 rk_anxdp_encoder_disable(struct drm_encoder *encoder) 108 { 109 } 110 111 static void 112 rk_anxdp_encoder_prepare(struct drm_encoder *encoder) 113 { 114 struct rk_anxdp_softc * const sc = to_rk_anxdp_encoder(encoder); 115 const u_int crtc_index = drm_crtc_index(encoder->crtc); 116 117 rk_anxdp_select_input(sc, crtc_index); 118 } 119 120 static const struct drm_encoder_funcs rk_anxdp_encoder_funcs = { 121 .destroy = drm_encoder_cleanup, 122 }; 123 124 static const struct drm_encoder_helper_funcs rk_anxdp_encoder_helper_funcs = { 125 .prepare = rk_anxdp_encoder_prepare, 126 .mode_fixup = rk_anxdp_encoder_mode_fixup, 127 .mode_set = rk_anxdp_encoder_mode_set, 128 .enable = rk_anxdp_encoder_enable, 129 .disable = rk_anxdp_encoder_disable, 130 }; 131 132 static int 133 rk_anxdp_ep_activate(device_t dev, struct fdt_endpoint *ep, bool activate) 134 { 135 struct rk_anxdp_softc * const sc = device_private(dev); 136 struct fdt_endpoint *in_ep = fdt_endpoint_remote(ep); 137 struct fdt_endpoint *out_ep, *out_rep; 138 struct drm_crtc *crtc; 139 int error; 140 141 if (sc->sc_activated != false) { 142 return 0; 143 } 144 145 if (!activate) 146 return EINVAL; 147 148 if (fdt_endpoint_port_index(ep) != ANXDP_PORT_INPUT) 149 return EINVAL; 150 151 switch (fdt_endpoint_type(in_ep)) { 152 case EP_DRM_CRTC: 153 crtc = fdt_endpoint_get_data(in_ep); 154 break; 155 default: 156 return EINVAL; 157 break; 158 } 159 160 sc->sc_encoder.possible_crtcs = 0x2; /* VOPB only */ 161 drm_encoder_init(crtc->dev, &sc->sc_encoder, &rk_anxdp_encoder_funcs, 162 DRM_MODE_ENCODER_TMDS, NULL); 163 drm_encoder_helper_add(&sc->sc_encoder, &rk_anxdp_encoder_helper_funcs); 164 165 out_ep = fdt_endpoint_get_from_index(&sc->sc_ports, ANXDP_PORT_OUTPUT, 0); 166 if (out_ep != NULL) { 167 out_rep = fdt_endpoint_remote(out_ep); 168 if (out_rep != NULL && fdt_endpoint_type(out_rep) == EP_DRM_PANEL) 169 sc->sc_base.sc_panel = fdt_endpoint_get_data(out_rep); 170 } 171 172 sc->sc_base.sc_connector.base.connector_type = DRM_MODE_CONNECTOR_eDP; 173 error = anxdp_bind(&sc->sc_base, &sc->sc_encoder); 174 if (error != 0) 175 return error; 176 sc->sc_activated = true; 177 178 if (out_ep != NULL) { 179 /* Ignore downstream connectors, we have our own. */ 180 if (out_rep != NULL && fdt_endpoint_type(out_rep) == EP_DRM_CONNECTOR) 181 return 0; 182 error = fdt_endpoint_activate(out_ep, activate); 183 if (error != 0) 184 return error; 185 } 186 187 return 0; 188 } 189 190 static void * 191 rk_anxdp_ep_get_data(device_t dev, struct fdt_endpoint *ep) 192 { 193 struct rk_anxdp_softc * const sc = device_private(dev); 194 195 return &sc->sc_encoder; 196 } 197 198 #if ANXDP_AUDIO 199 static audio_dai_tag_t 200 rk_anxdp_dai_get_tag(device_t dev, const void *data, size_t len) 201 { 202 struct rk_anxdp_softc * const sc = device_private(dev); 203 204 if (len != 4) 205 return NULL; 206 207 return &sc->sc_base.sc_dai; 208 } 209 210 static struct fdtbus_dai_controller_func rk_anxdp_dai_funcs = { 211 .get_tag = rk_anxdp_dai_get_tag 212 }; 213 #endif 214 215 static int 216 rk_anxdp_match(device_t parent, cfdata_t cf, void *aux) 217 { 218 struct fdt_attach_args * const faa = aux; 219 220 return of_compatible_match(faa->faa_phandle, compat_data); 221 } 222 223 static void 224 rk_anxdp_attach(device_t parent, device_t self, void *aux) 225 { 226 struct rk_anxdp_softc * const sc = device_private(self); 227 struct fdt_attach_args * const faa = aux; 228 const int phandle = faa->faa_phandle; 229 bus_addr_t addr; 230 bus_size_t size; 231 232 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 233 aprint_error(": couldn't get registers\n"); 234 return; 235 } 236 237 /* Required */ 238 if (fdtbus_clock_enable(phandle, "pclk", true) != 0) { 239 aprint_error(": couldn't enable pclk clock\n"); 240 return; 241 } 242 243 /* Required */ 244 if (fdtbus_clock_enable(phandle, "dp", true) != 0) { 245 aprint_error(": couldn't enable dp clock\n"); 246 return; 247 } 248 249 /* Optional */ 250 if (fdtbus_clock_enable(phandle, "grf", false) != 0) { 251 aprint_error(": couldn't enable grf clock\n"); 252 return; 253 } 254 255 /* TODO: Optional phy */ 256 257 sc->sc_base.sc_dev = self; 258 sc->sc_base.sc_bst = faa->faa_bst; 259 if (bus_space_map(sc->sc_base.sc_bst, addr, size, 0, &sc->sc_base.sc_bsh) != 0) { 260 aprint_error(": couldn't map registers\n"); 261 return; 262 } 263 sc->sc_phandle = faa->faa_phandle; 264 sc->sc_grf = fdtbus_syscon_acquire(phandle, "rockchip,grf"); 265 if (sc->sc_grf == NULL) { 266 aprint_error(": couldn't get grf syscon\n"); 267 return; 268 } 269 270 aprint_naive("\n"); 271 aprint_normal(": eDP TX\n"); 272 273 sc->sc_base.sc_flags |= ANXDP_FLAG_ROCKCHIP; 274 275 if (anxdp_attach(&sc->sc_base) != 0) { 276 aprint_error_dev(self, "failed to attach driver\n"); 277 return; 278 } 279 280 sc->sc_ports.dp_ep_activate = rk_anxdp_ep_activate; 281 sc->sc_ports.dp_ep_get_data = rk_anxdp_ep_get_data; 282 fdt_ports_register(&sc->sc_ports, self, phandle, EP_DRM_ENCODER); 283 284 #if ANXDP_AUDIO 285 fdtbus_register_dai_controller(self, phandle, &rk_anxdp_dai_funcs); 286 #endif 287 } 288 289 CFATTACH_DECL_NEW(rk_anxdp, sizeof(struct rk_anxdp_softc), 290 rk_anxdp_match, rk_anxdp_attach, NULL, NULL); 291
Indexes created Thu Oct 02 01:09:59 GMT 2025