| /src/sys/dev/ic/ |
| rng200.c | 53 uint32_t ctl, rng, rbg; local in function:rng200_reset
63 /* Reset RNG and RBG */
65 rng = READ4(sc, RNG200_RNG_RESET);
67 WRITE4(sc, RNG200_RNG_RESET, rng | RNG_RESET);
68 WRITE4(sc, RNG200_RNG_RESET, rng);
|
| /src/sys/stand/efiboot/ |
| efirng.c | 41 static EFI_RNG_PROTOCOL *rng; variable in typeref:typename:EFI_RNG_PROTOCOL *
69 /* Get the RNG protocol. */
70 status = LibLocateProtocol(&RngProtocolGuid, (void **)&rng);
73 rng = NULL;
88 command_printtab("RNG", "");
91 status = uefi_call_wrapper(rng->GetInfo, 3, rng, &alglistsz, alglist);
115 return rng != NULL;
126 status = uefi_call_wrapper(rng->GetRNG, 4, rng, &RngAlgorithmRawGuid
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| bcm-hr2.dtsi | 214 rng: rng@33000 { label
215 compatible = "brcm,bcm-nsp-rng";
|
| omap2.dtsi | 154 rng: rng@480a0000 { label
155 compatible = "ti,omap2-rng";
156 ti,hwmods = "rng";
|
| bcm-cygnus.dtsi | 429 rng: rng@18032000 { label
|
| bcm-nsp.dtsi | 365 rng: rng@33000 { label
366 compatible = "brcm,bcm-nsp-rng";
|
| bcm5301x.dtsi | 499 rng: rng@18004000 { label
500 compatible = "brcm,bcm5301x-rng";
|
| mt7629.dtsi | 130 rng: rng@1020f000 { label
131 compatible = "mediatek,mt7629-rng",
132 "mediatek,mt7623-rng";
135 clock-names = "rng";
|
| aspeed-g6.dtsi | 347 rng: hwrng@1e6e2524 { label
|
| omap5-l4.dtsi | 1814 rng: rng@0 { label in label:rng_target
1815 compatible = "ti,omap4-rng";
|
| stm32f429.dtsi | 794 rng: rng@50060800 { label
795 compatible = "st,stm32-rng";
797 clocks = <&rcc 0 STM32F4_AHB2_CLOCK(RNG)>;
|
| am33xx-l4.dtsi | 2264 rng: rng@0 { label
2265 compatible = "ti,omap4-rng";
|
| am437x-l4.dtsi | 2007 rng: rng@0 { label
2008 compatible = "ti,omap4-rng";
|
| mt7623.dtsi | 349 rng: rng@1020f000 { label
350 compatible = "mediatek,mt7623-rng";
353 clock-names = "rng";
|
| omap3.dtsi | 600 rng: rng@0 { label in label:rng_target
601 compatible = "ti,omap2-rng";
|
| omap4-l4.dtsi | 2018 rng: rng@0 { label in label:rng_target
2019 compatible = "ti,omap4-rng";
|
| /src/sys/arch/amd64/stand/prekern/ |
| prng.c | 57 } rng; variable in typeref:struct:__anon3e15344a0208
164 memset(&rng, 0, sizeof(rng));
183 memcpy(rng.state, digest, RNGSTATE_SIZE);
184 memcpy(rng.data, digest + RNGSTATE_SIZE, RNGDATA_SIZE);
194 SHA512_Update(&ctx, rng.state, RNGSTATE_SIZE);
198 memcpy(rng.state, digest, RNGSTATE_SIZE);
199 memcpy(rng.data, digest + RNGSTATE_SIZE, RNGDATA_SIZE);
201 rng.nused = 0;
211 if (rng.nused + sz > RNGDATA_SIZE)
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/ingenic/ |
| jz4780.dtsi | 86 rng: rng@d8 { label in label:cgu
87 compatible = "ingenic,jz4780-rng";
|
| x1000.dtsi | 77 rng: rng@d8 { label in label:cgu
78 compatible = "ingenic,x1000-rng";
|
| /src/sys/arch/arm/broadcom/ |
| bcm2835_pwm.c | 61 int rng, dat; member in struct:bcm_pwm_channel
152 sc->sc_channels[0].rng = PWM_RNG1;
162 sc->sc_channels[1].rng = PWM_RNG2;
205 pwm->rngsave = PWM_READ(pwm->sc, pwm->rng);
218 PWM_WRITE(pwm->sc, pwm->rng, pwm->rngsave);
228 bcm_pwm_control(struct bcm_pwm_channel *pwm, uint32_t ctl, uint32_t rng)
246 PWM_WRITE(sc, pwm->rng, rng);
|
| /src/sys/external/bsd/drm2/dist/drm/i915/selftests/ |
| intel_memory_region.c | 354 u32 rng = prandom_u32_state(&prng); local in function:igt_gpu_write
355 u32 dword = offset_in_page(rng) / 4;
362 err = igt_gpu_write_dw(ce, vma, dword, rng);
366 err = igt_cpu_check(obj, dword, rng);
472 0, /* rng placeholder */
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/apm/ |
| apm-shadowcat.dtsi | 790 rng: rng@10520000 { label
791 compatible = "apm,xgene-rng";
|
| apm-storm.dtsi | 1075 rng: rng@10520000 { label
1076 compatible = "apm,xgene-rng";
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/ |
| mt8516.dtsi | 458 rng: rng@1020c000 { label
459 compatible = "mediatek,mt8516-rng",
460 "mediatek,mt7623-rng";
463 clock-names = "rng";
|
| mt7622.dtsi | 292 rng: rng@1020f000 { label
293 compatible = "mediatek,mt7622-rng",
294 "mediatek,mt7623-rng";
297 clock-names = "rng";
|
