1 /* $NetBSD: rs5c372.c,v 1.19 2025/09/07 21:45:16 thorpej Exp $ */ 2 3 /*- 4 * Copyright (C) 2005 NONAKA Kimihiro <nonaka (at) netbsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: rs5c372.c,v 1.19 2025/09/07 21:45:16 thorpej Exp $"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/device.h> 34 #include <sys/kernel.h> 35 #include <sys/fcntl.h> 36 #include <sys/uio.h> 37 #include <sys/conf.h> 38 #include <sys/event.h> 39 40 #include <dev/clock_subr.h> 41 42 #include <dev/i2c/i2cvar.h> 43 #include <dev/i2c/rs5c372reg.h> 44 45 struct rs5c372rtc_softc { 46 device_t sc_dev; 47 i2c_tag_t sc_tag; 48 int sc_address; 49 struct todr_chip_handle sc_todr; 50 }; 51 52 static int rs5c372rtc_match(device_t, cfdata_t, void *); 53 static void rs5c372rtc_attach(device_t, device_t, void *); 54 55 CFATTACH_DECL_NEW(rs5c372rtc, sizeof(struct rs5c372rtc_softc), 56 rs5c372rtc_match, rs5c372rtc_attach, NULL, NULL); 57 58 static int rs5c372rtc_reg_write(struct rs5c372rtc_softc *, int, uint8_t); 59 static int rs5c372rtc_clock_read(struct rs5c372rtc_softc *, struct clock_ymdhms *); 60 static int rs5c372rtc_clock_write(struct rs5c372rtc_softc *, struct clock_ymdhms *); 61 static int rs5c372rtc_gettime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *); 62 static int rs5c372rtc_settime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *); 63 64 static const struct device_compatible_entry compat_data[] = { 65 { .compat = "ricoh,rs5c372a" }, 66 { .compat = "ricoh,rs5c372b" }, 67 DEVICE_COMPAT_EOL 68 }; 69 70 static int 71 rs5c372rtc_match(device_t parent, cfdata_t cf, void *arg) 72 { 73 struct i2c_attach_args *ia = arg; 74 int match_result; 75 76 if (iic_use_direct_match(ia, cf, compat_data, &match_result)) 77 return match_result; 78 79 /* indirect config - check typical address */ 80 if (ia->ia_addr == RS5C372_ADDR) 81 return I2C_MATCH_ADDRESS_ONLY; 82 83 return 0; 84 } 85 86 static void 87 rs5c372rtc_attach(device_t parent, device_t self, void *arg) 88 { 89 struct rs5c372rtc_softc *sc = device_private(self); 90 struct i2c_attach_args *ia = arg; 91 92 aprint_naive(": Real-time Clock\n"); 93 aprint_normal(": RICOH RS5C372[AB] Real-time Clock\n"); 94 95 sc->sc_tag = ia->ia_tag; 96 sc->sc_address = ia->ia_addr; 97 sc->sc_dev = self; 98 sc->sc_todr.todr_dev = self; 99 sc->sc_todr.todr_gettime_ymdhms = rs5c372rtc_gettime_ymdhms; 100 sc->sc_todr.todr_settime_ymdhms = rs5c372rtc_settime_ymdhms; 101 102 todr_attach(&sc->sc_todr); 103 104 /* Initialize RTC */ 105 rs5c372rtc_reg_write(sc, RS5C372_CONTROL2, RS5C372_CONTROL2_24HRS); 106 rs5c372rtc_reg_write(sc, RS5C372_CONTROL1, 0); 107 } 108 109 static int 110 rs5c372rtc_gettime_ymdhms(todr_chip_handle_t ch, struct clock_ymdhms *dt) 111 { 112 struct rs5c372rtc_softc *sc = device_private(ch->todr_dev); 113 114 return rs5c372rtc_clock_read(sc, dt); 115 } 116 117 static int 118 rs5c372rtc_settime_ymdhms(todr_chip_handle_t ch, struct clock_ymdhms *dt) 119 { 120 struct rs5c372rtc_softc *sc = device_private(ch->todr_dev); 121 122 return rs5c372rtc_clock_write(sc, dt); 123 } 124 125 static int 126 rs5c372rtc_reg_write(struct rs5c372rtc_softc *sc, int reg, uint8_t val) 127 { 128 uint8_t cmdbuf[2]; 129 int error; 130 131 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) { 132 aprint_error_dev(sc->sc_dev, 133 "rs5c372rtc_reg_write: failed to acquire I2C bus\n"); 134 return error; 135 } 136 137 reg &= 0xf; 138 cmdbuf[0] = (reg << 4); 139 cmdbuf[1] = val; 140 if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, 141 sc->sc_address, cmdbuf, 1, &cmdbuf[1], 1, 142 0)) != 0) { 143 iic_release_bus(sc->sc_tag, 0); 144 aprint_error_dev(sc->sc_dev, 145 "rs5c372rtc_reg_write: failed to write reg%d\n", reg); 146 return error; 147 } 148 149 iic_release_bus(sc->sc_tag, 0); 150 151 return 0; 152 } 153 154 static int 155 rs5c372rtc_clock_read(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt) 156 { 157 uint8_t bcd[RS5C372_NRTC_REGS]; 158 uint8_t cmdbuf[1]; 159 int error; 160 161 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) { 162 aprint_error_dev(sc->sc_dev, 163 "rs5c372rtc_clock_read: failed to acquire I2C bus\n"); 164 return (error); 165 } 166 167 cmdbuf[0] = (RS5C372_SECONDS << 4); 168 if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address, 169 cmdbuf, 1, bcd, RS5C372_NRTC_REGS, 0)) != 0) { 170 iic_release_bus(sc->sc_tag, 0); 171 aprint_error_dev(sc->sc_dev, 172 "rs5c372rtc_clock_read: failed to read rtc\n"); 173 return (error); 174 } 175 176 iic_release_bus(sc->sc_tag, 0); 177 178 /* 179 * Convert the RS5C372's register values into something useable 180 */ 181 dt->dt_sec = bcdtobin(bcd[RS5C372_SECONDS] & RS5C372_SECONDS_MASK); 182 dt->dt_min = bcdtobin(bcd[RS5C372_MINUTES] & RS5C372_MINUTES_MASK); 183 dt->dt_hour = bcdtobin(bcd[RS5C372_HOURS] & RS5C372_HOURS_24MASK); 184 dt->dt_day = bcdtobin(bcd[RS5C372_DATE] & RS5C372_DATE_MASK); 185 dt->dt_mon = bcdtobin(bcd[RS5C372_MONTH] & RS5C372_MONTH_MASK); 186 dt->dt_year = bcdtobin(bcd[RS5C372_YEAR]) + 2000; 187 188 return (0); 189 } 190 191 static int 192 rs5c372rtc_clock_write(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt) 193 { 194 uint8_t bcd[RS5C372_NRTC_REGS]; 195 uint8_t cmdbuf[1]; 196 int error; 197 198 /* 199 * Convert our time representation into something the RS5C372 200 * can understand. 201 */ 202 bcd[RS5C372_SECONDS] = bintobcd(dt->dt_sec); 203 bcd[RS5C372_MINUTES] = bintobcd(dt->dt_min); 204 bcd[RS5C372_HOURS] = bintobcd(dt->dt_hour); 205 bcd[RS5C372_DATE] = bintobcd(dt->dt_day); 206 bcd[RS5C372_DAY] = bintobcd(dt->dt_wday); 207 bcd[RS5C372_MONTH] = bintobcd(dt->dt_mon); 208 bcd[RS5C372_YEAR] = bintobcd(dt->dt_year % 100); 209 210 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) { 211 aprint_error_dev(sc->sc_dev, "rs5c372rtc_clock_write: failed to " 212 "acquire I2C bus\n"); 213 return (error); 214 } 215 216 cmdbuf[0] = (RS5C372_SECONDS << 4); 217 if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, 218 sc->sc_address, cmdbuf, 1, bcd, 219 RS5C372_NRTC_REGS, 0)) != 0) { 220 iic_release_bus(sc->sc_tag, 0); 221 aprint_error_dev(sc->sc_dev, 222 "rs5c372rtc_clock_write: failed to write rtc\n"); 223 return (error); 224 } 225 226 iic_release_bus(sc->sc_tag, 0); 227 228 return (0); 229 } 230
Indexes created Mon Sep 22 13:09:51 GMT 2025