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      1 /*	$NetBSD: kauai.c,v 1.42 2023/12/20 15:29:04 thorpej Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2003 Tsubai Masanari.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. The name of the author may not be used to endorse or promote products
     15  *    derived from this software without specific prior written permission.
     16  *
     17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: kauai.c,v 1.42 2023/12/20 15:29:04 thorpej Exp $");
     31 
     32 #include <sys/param.h>
     33 #include <sys/systm.h>
     34 #include <sys/device.h>
     35 
     36 #include <uvm/uvm_extern.h>
     37 
     38 #include <sys/bus.h>
     39 #include <machine/pio.h>
     40 
     41 #include <dev/ata/atareg.h>
     42 #include <dev/ata/atavar.h>
     43 #include <dev/ic/wdcvar.h>
     44 
     45 #include <dev/ofw/openfirm.h>
     46 
     47 #include <dev/pci/pcivar.h>
     48 #include <dev/pci/pcireg.h>
     49 #include <dev/pci/pcidevs.h>
     50 
     51 #include <macppc/dev/dbdma.h>
     52 
     53 #define WDC_REG_NPORTS		8
     54 #define WDC_AUXREG_OFFSET	0x16
     55 #define WDC_AUXREG_NPORTS	1
     56 
     57 #define PIO_CONFIG_REG	0x200	/* PIO and DMA access timing */
     58 #define DMA_CONFIG_REG	0x210	/* UDMA access timing */
     59 
     60 struct kauai_softc {
     61 	struct wdc_softc sc_wdcdev;
     62 	struct ata_channel *sc_chanptr;
     63 	struct ata_channel sc_channel;
     64 	struct wdc_regs sc_wdc_regs;
     65 	dbdma_regmap_t *sc_dmareg;
     66 	dbdma_command_t	*sc_dmacmd;
     67 	u_int sc_piotiming_r[2];
     68 	u_int sc_piotiming_w[2];
     69 	u_int sc_dmatiming_r[2];
     70 	u_int sc_dmatiming_w[2];
     71 	void (*sc_calc_timing)(struct kauai_softc *, int);
     72 };
     73 
     74 static int kauai_match(device_t, cfdata_t, void *);
     75 static void kauai_attach(device_t, device_t, void *);
     76 static int kauai_dma_init(void *, int, int, void *, size_t, int);
     77 static void kauai_dma_start(void *, int, int);
     78 static int kauai_dma_finish(void *, int, int, int);
     79 static void kauai_set_modes(struct ata_channel *);
     80 static void calc_timing_kauai(struct kauai_softc *, int);
     81 
     82 CFATTACH_DECL_NEW(kauai, sizeof(struct kauai_softc),
     83     kauai_match, kauai_attach, NULL, NULL);
     84 
     85 int
     86 kauai_match(device_t parent, cfdata_t match, void *aux)
     87 {
     88 	struct pci_attach_args *pa = aux;
     89 
     90 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE) {
     91 		switch (PCI_PRODUCT(pa->pa_id)) {
     92 		case PCI_PRODUCT_APPLE_KAUAI:
     93 		case PCI_PRODUCT_APPLE_UNINORTH_ATA:
     94 		case PCI_PRODUCT_APPLE_INTREPID2_ATA:
     95 		case PCI_PRODUCT_APPLE_SHASTA_ATA:
     96 		case PCI_PRODUCT_APPLE_K2_UATA:
     97 		    return 5;
     98 		}
     99 	}
    100 
    101 	return 0;
    102 }
    103 
    104 void
    105 kauai_attach(device_t parent, device_t self, void *aux)
    106 {
    107 	struct kauai_softc *sc = device_private(self);
    108 	struct pci_attach_args *pa = aux;
    109 	struct ata_channel *chp = &sc->sc_channel;
    110 	struct wdc_regs *wdr;
    111 	pci_intr_handle_t ih;
    112 	paddr_t regbase, dmabase;
    113 	int node, reg[5], i;
    114 	uint32_t intrs[4], intr;
    115 	char buf[PCI_INTRSTR_LEN];
    116 
    117 	sc->sc_wdcdev.sc_atac.atac_dev = self;
    118 
    119 	sc->sc_dmacmd = dbdma_alloc(sizeof(dbdma_command_t) * 20, NULL);
    120 	node = pcidev_to_ofdev(pa->pa_pc, pa->pa_tag);
    121 	if (node == 0) {
    122 		aprint_error(": cannot find kauai node\n");
    123 		return;
    124 	}
    125 
    126 	if (OF_getprop(node, "assigned-addresses", reg, sizeof reg) < 12) {
    127 		aprint_error(": cannot get address property\n");
    128 		return;
    129 	}
    130 	regbase = reg[2] + 0x2000;
    131 	dmabase = reg[2] + 0x1000;
    132 
    133 	/*
    134 	 * XXX PCI_INTERRUPT_REG seems to be wired to 0.
    135 	 * XXX So use fixed intrpin and intrline values if the interrupts
    136 	 * XXX property contains no IRQ line
    137 	 */
    138 	intr = 0;
    139 	pa->pa_intrpin = 1;
    140 	if (OF_getprop(node, "interrupts", intrs, sizeof(intrs)) >= 4) {
    141 		intr = intrs[0];
    142 		/*
    143 		 * the interrupts property on my iBook G4's kauai contains
    144 		 * 0x00000001 0x00000000, so fix that up here
    145 		 * TODO: use parent's interrupt-map property to do this right
    146 		 */
    147 		if (intr < 10)
    148 			intr = 0;
    149 		aprint_debug_dev(self,
    150 		    "got %d from interrupts property\n", intr);
    151 	}
    152 	if (intr == 0) {
    153 		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_SHASTA_ATA) {
    154 			intr = 38;
    155 		} else
    156 			intr = 39;
    157 	}
    158 	pa->pa_intrline = intr;
    159 
    160 	if (pci_intr_map(pa, &ih)) {
    161 		aprint_error(": unable to map interrupt\n");
    162 		return;
    163 	}
    164 	aprint_normal(": interrupting at %s\n", pci_intr_string(pa->pa_pc, ih,
    165 	    buf, sizeof(buf)));
    166 
    167 	sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs;
    168 
    169 	wdr->cmd_iot = wdr->ctl_iot = pa->pa_memt;
    170 
    171 	if (bus_space_map(wdr->cmd_iot, regbase, WDC_REG_NPORTS << 4, 0,
    172 	    &wdr->cmd_baseioh) ||
    173 	    bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
    174 			WDC_AUXREG_OFFSET << 4, 1, &wdr->ctl_ioh)) {
    175 		aprint_error_dev(self, "couldn't map registers\n");
    176 		return;
    177 	}
    178 	for (i = 0; i < WDC_NREG; i++) {
    179 		if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, i << 4,
    180 		    i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0) {
    181 			bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh,
    182 			    WDC_REG_NPORTS << 4);
    183 			aprint_error_dev(self,
    184 			    "couldn't subregion registers\n");
    185 			return;
    186 		}
    187 	}
    188 
    189 	if (pci_intr_establish_xname(pa->pa_pc, ih, IPL_BIO, wdcintr, chp,
    190 	    device_xname(self)) == NULL) {
    191 		aprint_error_dev(self, "unable to establish interrupt\n");
    192 		return;
    193 	}
    194 
    195 
    196 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
    197 	sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
    198 	sc->sc_wdcdev.sc_atac.atac_udma_cap = 5;
    199 	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
    200 	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA;
    201 	sc->sc_chanptr = chp;
    202 	sc->sc_wdcdev.sc_atac.atac_channels = &sc->sc_chanptr;
    203 	sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
    204 	sc->sc_wdcdev.wdc_maxdrives = 2;
    205 	sc->sc_wdcdev.dma_arg = sc;
    206 	sc->sc_wdcdev.dma_init = kauai_dma_init;
    207 	sc->sc_wdcdev.dma_start = kauai_dma_start;
    208 	sc->sc_wdcdev.dma_finish = kauai_dma_finish;
    209 	sc->sc_wdcdev.sc_atac.atac_set_modes = kauai_set_modes;
    210 	sc->sc_calc_timing = calc_timing_kauai;
    211 	sc->sc_dmareg = mapiodev(dmabase, 0x1000, false);
    212 
    213 	chp->ch_channel = 0;
    214 	chp->ch_atac = &sc->sc_wdcdev.sc_atac;
    215 
    216 	wdc_init_shadow_regs(wdr);
    217 
    218 	wdcattach(chp);
    219 }
    220 
    221 void
    222 kauai_set_modes(struct ata_channel *chp)
    223 {
    224 	struct kauai_softc *sc = (void *)chp->ch_atac;
    225 	struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp);
    226 	struct ata_drive_datas *drvp0 = &chp->ch_drive[0];
    227 	struct ata_drive_datas *drvp1 = &chp->ch_drive[1];
    228 	struct ata_drive_datas *drvp;
    229 	int drive;
    230 
    231 	if (drvp0->drive_type != ATA_DRIVET_NONE &&
    232 	    drvp1->drive_type != ATA_DRIVET_NONE) {
    233 		drvp0->PIO_mode = drvp1->PIO_mode =
    234 		    uimin(drvp0->PIO_mode, drvp1->PIO_mode);
    235 	}
    236 
    237 	for (drive = 0; drive < 2; drive++) {
    238 		drvp = &chp->ch_drive[drive];
    239 		if (drvp->drive_type !=  ATA_DRIVET_NONE) {
    240 			(*sc->sc_calc_timing)(sc, drive);
    241 			bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh,
    242 			    PIO_CONFIG_REG, sc->sc_piotiming_r[drive]);
    243 			bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh,
    244 			    DMA_CONFIG_REG, sc->sc_dmatiming_r[drive]);
    245 		}
    246 	}
    247 }
    248 
    249 /*
    250  * IDE transfer timings
    251  */
    252 static const u_int pio_timing_kauai[] = {	/* 0xff000fff */
    253 	0x08000a92,	/* Mode 0 */
    254 	0x0800060f,	/*      1 */
    255 	0x0800038b,	/*      2 */
    256 	0x05000249,	/*      3 */
    257 	0x04000148	/*      4 */
    258 };
    259 static const u_int dma_timing_kauai[] = {	/* 0x00fff000 */
    260 	0x00618000,	/* Mode 0 */
    261 	0x00209000,	/*      1 */
    262 	0x00148000	/*      2 */
    263 };
    264 static const u_int udma_timing_kauai[] = {	/* 0x0000ffff */
    265 	0x000070c0,	/* Mode 0 */
    266 	0x00005d80,	/*      1 */
    267 	0x00004a60,	/*      2 */
    268 	0x00003a50,	/*      3 */
    269 	0x00002a30,	/*      4 */
    270 	0x00002921	/*      5 */
    271 };
    272 
    273 /*
    274  * Timing calculation for Kauai.
    275  */
    276 void
    277 calc_timing_kauai(struct kauai_softc *sc, int drive)
    278 {
    279 	struct ata_channel *chp = &sc->sc_channel;
    280 	struct ata_drive_datas *drvp = &chp->ch_drive[drive];
    281 	int piomode = drvp->PIO_mode;
    282 	int dmamode = drvp->DMA_mode;
    283 	int udmamode = drvp->UDMA_mode;
    284 	u_int pioconf, dmaconf;
    285 
    286 	pioconf = pio_timing_kauai[piomode];
    287 
    288 	dmaconf = 0;
    289 	if (drvp->drive_flags & ATA_DRIVE_DMA)
    290 		dmaconf |= dma_timing_kauai[dmamode];
    291 	if (drvp->drive_flags & ATA_DRIVE_UDMA)
    292 		dmaconf |= udma_timing_kauai[udmamode];
    293 
    294 	if (drvp->drive_flags & ATA_DRIVE_UDMA)
    295 		dmaconf |= 1;
    296 
    297 	sc->sc_piotiming_r[drive] = sc->sc_piotiming_w[drive] = pioconf;
    298 	sc->sc_dmatiming_r[drive] = sc->sc_dmatiming_w[drive] = dmaconf;
    299 }
    300 
    301 int
    302 kauai_dma_init(void *v, int channel, int drive, void *databuf,
    303 	size_t datalen, int flags)
    304 {
    305 	struct kauai_softc *sc = v;
    306 	dbdma_command_t *cmdp = sc->sc_dmacmd;
    307 	struct ata_channel *chp = &sc->sc_channel;
    308 	struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp);
    309 	vaddr_t va = (vaddr_t)databuf;
    310 	int read = flags & WDC_DMA_READ;
    311 	int cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE;
    312 	u_int offset;
    313 
    314 	bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG,
    315 	    read ? sc->sc_dmatiming_r[drive] : sc->sc_dmatiming_w[drive]);
    316 	bus_space_read_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG);
    317 
    318 	offset = va & PGOFSET;
    319 
    320 	/* if va is not page-aligned, setup the first page */
    321 	if (offset != 0) {
    322 		int rest = PAGE_SIZE - offset;	/* the rest of the page */
    323 
    324 		if (datalen > rest) {		/* if continues to next page */
    325 			DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va),
    326 				DBDMA_INT_NEVER, DBDMA_WAIT_NEVER,
    327 				DBDMA_BRANCH_NEVER);
    328 			datalen -= rest;
    329 			va += rest;
    330 			cmdp++;
    331 		}
    332 	}
    333 
    334 	/* now va is page-aligned */
    335 	while (datalen > PAGE_SIZE) {
    336 		DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, vtophys(va),
    337 			DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    338 		datalen -= PAGE_SIZE;
    339 		va += PAGE_SIZE;
    340 		cmdp++;
    341 	}
    342 
    343 	/* the last page (datalen <= PAGE_SIZE here) */
    344 	cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST;
    345 	DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va),
    346 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    347 	cmdp++;
    348 
    349 	DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
    350 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    351 
    352 	return 0;
    353 }
    354 
    355 void
    356 kauai_dma_start(void *v, int channel, int drive)
    357 {
    358 	struct kauai_softc *sc = v;
    359 
    360 	dbdma_start(sc->sc_dmareg, sc->sc_dmacmd);
    361 }
    362 
    363 int
    364 kauai_dma_finish(void *v, int channel, int drive, int read)
    365 {
    366 	struct kauai_softc *sc = v;
    367 
    368 	dbdma_stop(sc->sc_dmareg);
    369 	return 0;
    370 }
    371