1 /* $NetBSD: slhci_zbus.c,v 1.3 2023/12/20 00:40:42 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2013 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Radoslaw Kujawa. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: slhci_zbus.c,v 1.3 2023/12/20 00:40:42 thorpej Exp $"); 34 35 /* 36 * Thylacine driver. 37 * Inspired by slhci_intio.c. 38 */ 39 40 #include <sys/param.h> 41 #include <sys/device.h> 42 #include <sys/systm.h> 43 #include <sys/bus.h> 44 45 #include <amiga/amiga/device.h> 46 #include <amiga/amiga/isr.h> 47 48 #include <amiga/dev/zbusvar.h> 49 50 #include <dev/usb/usb.h> 51 #include <dev/usb/usbdi.h> 52 #include <dev/usb/usbdivar.h> 53 54 #include <dev/ic/sl811hsreg.h> 55 #include <dev/ic/sl811hsvar.h> 56 57 #define THYLACINE_SLHCI_PWR_OFFSET 0x100 58 #define THYLACINE_SLHCI_ADDR_OFFSET 0x1 59 #define THYLACINE_SLHCI_DATA_STRIDE 0x4000 60 #define THYLACINE_SIZE 0x8000 61 62 static int slhci_zbus_match(device_t, cfdata_t , void *); 63 static void slhci_zbus_attach(device_t, device_t, void *); 64 static void slhci_zbus_enable_power(void *, enum power_change); 65 66 struct slhci_zbus_softc { 67 struct slhci_softc sc_sc; 68 69 struct bus_space_tag sc_bst; 70 struct isr sc_isr; 71 }; 72 73 CFATTACH_DECL_NEW(slhci_zbus, sizeof(struct slhci_zbus_softc), 74 slhci_zbus_match, slhci_zbus_attach, NULL, NULL); 75 76 static int 77 slhci_zbus_match(device_t parent, cfdata_t cf, void *aux) 78 { 79 struct zbus_args *zap = aux; 80 81 /* Thylacine */ 82 if (zap->manid == 0x1392 && zap->prodid == 0x1) { 83 return 1; 84 } 85 86 return 0; 87 } 88 89 static void 90 slhci_zbus_attach(device_t parent, device_t self, void *aux) 91 { 92 struct slhci_zbus_softc *zsc; 93 struct slhci_softc *sc; 94 struct zbus_args *zap; 95 bus_space_tag_t iot; 96 bus_space_handle_t ioh; 97 98 zap = aux; 99 zsc = device_private(self); 100 sc = &zsc->sc_sc; 101 sc->sc_dev = self; 102 sc->sc_bus.ub_hcpriv = sc; 103 104 zsc->sc_bst.base = (bus_addr_t)zap->va; 105 zsc->sc_bst.absm = &amiga_bus_stride_1; 106 iot = &zsc->sc_bst; 107 108 aprint_normal(": Thylacine USB Host Controller\n"); 109 110 if (bus_space_map(iot, THYLACINE_SLHCI_ADDR_OFFSET, THYLACINE_SIZE, 0, 111 &ioh)) { 112 aprint_error_dev(sc->sc_dev, "can't map the bus\n"); 113 } 114 115 slhci_preinit(sc, slhci_zbus_enable_power, iot, ioh, 500, 116 THYLACINE_SLHCI_DATA_STRIDE); 117 118 /* Attach interrupt routine. */ 119 zsc->sc_isr.isr_intr = slhci_intr; 120 zsc->sc_isr.isr_arg = sc; 121 zsc->sc_isr.isr_ipl = 6; 122 add_isr(&zsc->sc_isr); 123 124 slhci_attach(sc); 125 126 } 127 128 static void 129 slhci_zbus_enable_power(void *arg, enum power_change mode) 130 { 131 struct slhci_zbus_softc *zsc = arg; 132 133 /* 134 * The hardware is dumb. Changing power mode depends only on A8 being 135 * low or high. 136 */ 137 if (mode == POWER_ON) 138 bus_space_read_1(zsc->sc_sc.sc_iot, zsc->sc_sc.sc_ioh, 139 THYLACINE_SLHCI_DATA_STRIDE); 140 else 141 bus_space_read_1(zsc->sc_sc.sc_iot, zsc->sc_sc.sc_ioh, 142 THYLACINE_SLHCI_PWR_OFFSET); 143 } 144 145