| /src/sys/dev/usb/ |
| umcs.c | 448 int spreg = umcs7840_reg_sp(physport); local
462 err = umcs7840_get_reg(sc, spreg, &data);
467 err = umcs7840_set_reg(sc, spreg, data);
732 int spreg = umcs7840_reg_sp(pn); local
750 if (umcs7840_get_reg(sc, spreg, &data))
753 if (umcs7840_set_reg(sc, spreg, data))
756 if (umcs7840_set_reg(sc, spreg, data))
801 if (umcs7840_get_reg(sc, spreg, &data))
804 if (umcs7840_set_reg(sc, spreg, data))
808 if (umcs7840_set_reg(sc, spreg, data)
[all...] |
| /src/external/gpl3/gdb/dist/sim/ppc/ |
| spreg.h | 1 /* DO NOT EDIT: GENERATED BY spreg-gen.py.
24 typedef unsigned_word spreg; typedef
|
| psim.c | 805 spreg spreg; member in union:__anon19927
835 cooked_buf.spreg = cpu_registers(processor)->spr[description.index];
966 spreg spreg; member in union:__anon19928
1035 cpu_registers(processor)->spr[description.index] = cooked_buf.spreg;
|
| /src/external/gpl3/gdb.old/dist/sim/ppc/ |
| spreg.h | 1 /* DO NOT EDIT: GENERATED BY spreg-gen.py.
24 typedef unsigned_word spreg; typedef
|
| psim.c | 805 spreg spreg; member in union:__anon22666
835 cooked_buf.spreg = cpu_registers(processor)->spr[description.index];
966 spreg spreg; member in union:__anon22667
1035 cpu_registers(processor)->spr[description.index] = cooked_buf.spreg;
|
| /src/external/gpl3/gcc/dist/gcc/config/bfin/ |
| bfin.cc | 330 SPREG contains (reg:SI REG_SP). IS_INTHANDLER is true if we're doing
334 expand_prologue_reg_save (rtx spreg, int saveall, bool is_inthandler)
336 rtx predec1 = gen_rtx_PRE_DEC (SImode, spreg);
371 XVECEXP (pat, 0, total_consec + 1) = gen_rtx_SET (spreg,
373 spreg,
382 gen_rtx_PLUS (Pmode, spreg,
439 SPREG contains (reg:SI REG_SP). IS_INTHANDLER is true if we're doing
443 expand_epilogue_reg_restore (rtx spreg, bool saveall, bool is_inthandler)
445 rtx postinc1 = gen_rtx_POST_INC (SImode, spreg);
499 = gen_rtx_SET (spreg, gen_rtx_PLUS (Pmode, spreg
1067 rtx spreg = gen_rtx_REG (Pmode, REG_SP); local
1151 rtx spreg = gen_rtx_REG (Pmode, REG_SP); local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/bfin/ |
| bfin.cc | 330 SPREG contains (reg:SI REG_SP). IS_INTHANDLER is true if we're doing
334 expand_prologue_reg_save (rtx spreg, int saveall, bool is_inthandler)
336 rtx predec1 = gen_rtx_PRE_DEC (SImode, spreg);
371 XVECEXP (pat, 0, total_consec + 1) = gen_rtx_SET (spreg,
373 spreg,
382 gen_rtx_PLUS (Pmode, spreg,
439 SPREG contains (reg:SI REG_SP). IS_INTHANDLER is true if we're doing
443 expand_epilogue_reg_restore (rtx spreg, bool saveall, bool is_inthandler)
445 rtx postinc1 = gen_rtx_POST_INC (SImode, spreg);
499 = gen_rtx_SET (spreg, gen_rtx_PLUS (Pmode, spreg
1067 rtx spreg = gen_rtx_REG (Pmode, REG_SP); local
1151 rtx spreg = gen_rtx_REG (Pmode, REG_SP); local
[all...] |
